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Thin film transistor array substrate having particular patterned electrode

  • US 7,349,035 B2
  • Filed: 04/02/2007
  • Issued: 03/25/2008
  • Est. Priority Date: 08/05/2004
  • Status: Active Grant
First Claim
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1. A thin film transistor array substrate, comprising:

  • a substrate;

    a plurality of scan lines disposed over the substrate;

    a plurality of data lines disposed over the substrate, wherein the scan lines and the data lines together define a plurality of pixel areas;

    a plurality of thin film transistors with each thin film transistor disposed inside one of the pixel areas, wherein each thin film transistor is driven by one of the scan lines;

    a plurality of pixel electrodes with each pixel electrode disposed inside one of the pixel areas and electrically connected to one of the thin film transistors, wherein a portion area of each pixel electrode is disposed above one of the scan lines; and

    a patterned upper electrode disposed between each pixel electrode and one of the scan lines, wherein the patterned upper electrode further comprises a plurality of sub-upper electrodes with a portion area of each sub-upper electrode electrically connected to one of the pixel electrodes.

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