PPM receiving system and method using time-interleaved integrators

• US 7,349,471 B2
• Filed: 11/19/2003
• Issued: 03/25/2008
• Est. Priority Date: 11/19/2003
• Status: Active Grant

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Hitko, Donald A., Cosand, Albert, Yung, Michael
• Primary Examiner(s): Payne; David C.
• Assistant Examiner(s): Bolourchi; Nader
• Application Number:
  US10/707,076
• Publication Number:
  US 20050105606A1
• Time in Patent Office: 1,588 Days
• Field of Search: 375/239, 375/346, 375/259
• US Class Current: 375/239
• CPC Class Codes: H03K 9/04 of position-modulated pulses
• CPC Class Codes: H04L 25/4902 Pulse width modulation; Pulse position modulation

Abstract

A communication receiver (30) includes a data receiver (34) that receives a pulse-position modulated signal (38). A clock circuit (70) separates a reference clock signal (36) into multiple coordinating clock signals A, B, and C. Multiple time integrators (78) are gated to generate multiple time-integrated signals in response to the pulse-position modulated signal (38) and the coordinating clock signals A, B, and C. A combiner (96) forms a demodulated signal from the time-integrated signals IntA, IntB, and IntC.

Claims

1. A communication receiver comprising:

a data receiver receiving at least one pulse-position modulated signal;

a clock circuit separating a reference clock signal into a plurality of coordinating clock signals;

a plurality of time integrators gated to generate a plurality of time-integrated signals in response to said at least one pulse-position modulated signal and said plurality of coordinating clock signals;

a combiner forming a demodulated signal from said plurality of time-integrated signals;

a first transimpedance amplifier converting said reference clock signal from being in the form of a current signal into a first voltage swing signal; and

a second transimpedance amplifier converting said at least one pulse-position modulated signal from being in the form of a current signal into a second voltage swing signal;

wherein said combiner sums at least a portion of said plurality of time-integrated signals to form said demodulated signal.

2. A communication receiver as in claim 1 wherein said data receiver comprises at least one electrical transducer.

3. A communication receiver as in claim 2 wherein said at least one electrical transducer comprises at least one photodiode.

4. A communication receiver as in claim 1 further comprising a clock receiver receiving said reference clock signal.

5. A communication receiver as in claim 4 wherein said clock receiver comprises at least one electrical transducer.

6. A communication receiver as in claim 5 wherein said at least one electrical transducer comprises at least one photodiode.

7. A communication receiver as in claim 1 further comprising a clock recovery circuit recovering said reference clock signal.

8. A communication receiver as in claim 7 wherein said clock recovery circuit comprises a phase lock loop.

9. A communication receiver as in claim 1 further comprising a one-shot timer circuit widening pulses within said reference clock signal.

10. A communication receiver as in claim 1 further comprising a one-shot timer circuit widening pulses within said at least one pulse-position modulated signal.

11. A communication receiver as in claim 1 further comprising a plurality of switches coupled to said plurality of time integrators, said combiner forming said demodulated signal in response to state of said plurality of switches.

12. A communication receiver as in claim 1 wherein said plurality of time integrators are gated to begin integration in response to the plurality of coordinating clock signals.

13. A communication receiver as in claim 1 wherein said plurality of time integrators are gated to cease integration in response to said at least one pulse-position modulated signal.

14. A communication receiver as in claim 1 wherein said plurality of time integrators integrate a constant input value in response to said at least one pulse-position modulated signal and said plurality of coordinating clock signals.

15. A communication receiver as in claim 14 wherein said plurality of time integrators comprise at least one current source providing said constant value.

16. A communication receiver as in claim 1 wherein said plurality of time integrators comprise:

at least one integration switch;

at least one hold switch; and

at least one reset switch.

17. A communication system as in claim 16 wherein said plurality of time integrators perform integration in response to said at least one integration switch.

18. A communication system as in claim 16 wherein said plurality of time integrators hold a voltage value in response to said at least one hold switch.

19. A communication system as in claim 16 wherein said plurality of time integrators reset a voltage value to a nominal value in response to said at least one reset switch.

20. A communication system comprising:

a transmitter generating at least one pulse-position modulated signal; and

a communication receiver comprising;

a data receiver receiving said at least one pulse-position modulated signal;

a clock circuit separating a reference clock signal into a plurality of coordinating clock signals;

a plurality of time integrators gated to generate a plurality of time-integrated signals in response to said at least one pulse-position modulated signal and said plurality of coordinating clock signals;

a combiner forming a demodulated signal from said plurality of time-integrated signals;

a first transimpedance amplifier converting said reference clock signal from being in the form of a current signal into a first voltage swing signal; and

a second transimpedance amplifier converting said at least one pulse-position modulated signal from being in the form of a current signal into a second voltage swing signal;

wherein said combiner sums at least a portion of said plurality of time-integrated signals to form said demodulated signal.

21. A communication receiver as in claim 20 further comprising a clock recovery circuit recovering said reference clock signal.

22. A communication receiver as in claim 20 further comprising a one-shot timer circuit widening pulses within said reference clock signal.

23. A communication system comprising:

a first station having a transmitter generating at least one pulse-position modulated signal; and

a second station having a communication receiver comprising;

a data receiver receiving said at least one pulse-position modulated signal;

a clock circuit separating a reference clock signal into a plurality of coordinating clock signals;

a plurality of time integrators gated to generate a plurality of time-integrated signals in response to said at least one pulse-position modulated signal and said plurality of coordinating clock signals;

a combiner forming a demodulated signal from said plurality of time-integrated signals;

a first transimpedance amplifier converting said reference clock signal from being in the form of a current signal into a first voltage swing signal; and

a second transimpedance amplifier converting said at least one pulse-position modulated signal from being in the form of a current signal into second a voltage swing signal;

wherein said combiner sums at least a portion of said plurality of time-integrated signals to form said demodulated signal.

24. A method of extracting information from pulse-position modulated signals comprising:

receiving at least one reference clock signal;

recovering said reference clock signal from said at least one pulse-position modulated signal;

receiving at least one pulse-position modulated signal;

separating a reference clock signal into a plurality of clock signals;

converting said reference clock signal from a current signal into a first voltage swing signal;

converting said at least one pulse-width modulation signal from a current signal into a second voltage swing signal;

gating a plurality of time integrators to generate a plurality of time-integrated signals in response to said at least one pulse-position modulated signal and said plurality of clock signals; and

generating a demodulated signal from said plurality of time-integrated signals.

25. A method as in claim 24 further comprising widening pulses within said reference clock signal.

26. A method as in claim 24 further comprising widening pulses within said at least one pulse-position modulated signal.

27. A method as in claim 24 wherein separating said reference clock signal into a plurality of clock signals comprises generating said plurality of clock signals out-of-phase from each other.

28. A method as in claim 24 wherein gating said plurality of time integrators comprises beginning integration in response to the plurality of coordinating clock signals.

29. A method as in claim 24 wherein gating said plurality of time integrators comprises ceasing integration in response to said at least one pulse-position modulated signal.

30. A method as in claim 24 wherein gating said plurality of time integrators comprises integrating a constant current in response to said at least one pulse-position modulated signal and said plurality of coordinating clock signals.

31. A method of demodulating communication signals comprising:

receiving at least one pulse-position modulated signal and at least one reference clock signal, converting said at least one reference clock signal and said pulse-position modulated signal into voltage swing type signals;

separating said reference clock signal into a plurality of coordinating clock signals;

widening pulses within said reference clock signal;

gating a plurality of time integrators to generate a plurality of time-integrated signals comprising;

beginning integration in response to the plurality of coordinating clock signals;

integrating a constant value; and

ceasing integration in response to said at least one pulse-position modulated signal; and

generating a demodulated signal from said plurality of time-integrated signals.

32. A method as in claim 31 further comprising recovering said reference clock signal.