System and method for accessing and operating personal computers remotely
First Claim
Patent Images
1. A computer circuit coupled to a data bus and communicating with a Host PC, comprising:
- a video input buffering circuit receiving RGB video signals from the Host PC;
an analog to digital converter circuit coupled to the video input buffering circuit to receive and digitize the RGB video signals;
a main gate array circuit to receive the digitized RGB video signals from the analog to digital converter circuit;
a video memory circuit to store the digitized RGB video signals;
a second gate array circuit coupled to the main gate array circuit, the second gate array circuit bridging data between the main gate array circuit and the data bus;
a system clock circuit providing clock signals to the main and second gate array circuits;
a main cpu, communicating with the main and second gate array circuits to direct data between the video memory circuit and the second gate array circuit, the main gate array also controlling data traffic between the analog to digital converter circuit, the video memory circuit, and the main cpu;
a keyboard cpu in communication with the main cpu and at least one of an external keyboard and an external mouse; and
a pixel clock generator to provide a pixel clock signal to the analog to digital converter circuit, the pixel clock generator reproducing in frequency and phase a host pixel clock signal used by the Host PC to produce the RGB video signals received by the video input buffering circuit.
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Abstract
A remote access device is disclosed for capturing, digitizing and communicating video signals from a host computer to a remote computer. The remote computer returns keyboard and mouse signals through the remote access device to the host computer to control the host computer as though the remote keyboard and mouse were directly connected to the host computer. The remote access device includes a circuit module interface for the host computer that allows the remote access device to operate independently of any operating system characteristics associated with the host computer.
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Citations
13 Claims
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1. A computer circuit coupled to a data bus and communicating with a Host PC, comprising:
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a video input buffering circuit receiving RGB video signals from the Host PC; an analog to digital converter circuit coupled to the video input buffering circuit to receive and digitize the RGB video signals; a main gate array circuit to receive the digitized RGB video signals from the analog to digital converter circuit; a video memory circuit to store the digitized RGB video signals; a second gate array circuit coupled to the main gate array circuit, the second gate array circuit bridging data between the main gate array circuit and the data bus; a system clock circuit providing clock signals to the main and second gate array circuits; a main cpu, communicating with the main and second gate array circuits to direct data between the video memory circuit and the second gate array circuit, the main gate array also controlling data traffic between the analog to digital converter circuit, the video memory circuit, and the main cpu; a keyboard cpu in communication with the main cpu and at least one of an external keyboard and an external mouse; and a pixel clock generator to provide a pixel clock signal to the analog to digital converter circuit, the pixel clock generator reproducing in frequency and phase a host pixel clock signal used by the Host PC to produce the RGB video signals received by the video input buffering circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification