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System and method for testing a memory using DMA

  • US 7,350,109 B2
  • Filed: 11/14/2003
  • Issued: 03/25/2008
  • Est. Priority Date: 11/14/2003
  • Status: Active Grant
First Claim
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1. A computer system comprising:

  • a processor configured to execute an operating system;

    a first bus coupled to the processor;

    a memory; and

    a core electronics complex including;

    a memory controller coupled to the first bus and the memory;

    a first input/output (I/O) controller coupled to the first bus and configured to couple to a first set of one or more I/O devices using a first connection; and

    a test module coupled to the first I/O controller using a second connection that is separate from the first connection and the first bus;

    wherein the test module is configured to provide test transactions to the first I/O controller using the second connection, and wherein the first I/O controller is configured to provide the test transactions to the memory controller using the first bus to cause tests to be performed on the memory.

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