SONET/SDH payload re-mapping and cross-connect

• US 7,353,288 B1
• Filed: 10/17/2001
• Issued: 04/01/2008
• Est. Priority Date: 10/17/2001
• Status: Expired due to Fees

• Current Assignee: Ciena Corporation
• Original Assignee: Ciena Corporation
• Inventors: Kalapatapu, Venkata, Rangavajjhala, Venkata
• Primary Examiner(s): Donaghue; Larry D.
• Assistant Examiner(s): BILGRAMI, ASGHAR H
• Application Number:
  US09/978,927
• Time in Patent Office: 2,358 Days
• Field of Search: 709/232, 709/233, 709/236, 370/412, 370/466
• US Class Current: 709/236
• CPC Class Codes: H04J 2203/0012 Switching modules and their interconnections
• CPC Class Codes: H04J 2203/0026 Physical details
• CPC Class Codes: H04J 2203/006 Fault tolerance and recovery
• CPC Class Codes: H04J 2203/0073 Services, e.g. multimedia, GOS, QOS
• CPC Class Codes: H04J 3/0623 Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
• CPC Class Codes: H04J 3/1611 Synchronous digital hierarchy [SDH] or SONET H04J3/1664 takes precedence for interactions with OTN

Abstract

Multiple frames of SDH framed data are received. Each frame has an overhead portion and a payload portion. The payload portions of multiple frames are identified and extracted. These payloads are switched and re-mapped to a different STM structure as required.

Claims

1. An apparatus to remap SONET/SDH payloads from a received STS/STM frame structure to a destination STS/STM frame structure, comprising:

a plurality of cards coupled via a backplane, the plurality of cards comprising;

a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;

a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using higher speed connections; and

a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;

a buffer memory coupled to receive a payload portion of the received SONET/SDH framed data;

a pointer generator coupled to the buffer memory, the pointer generator to operate in a time-sliced manner to generate the destination STS/STM frame structure with aligned, remapped payload; and

a pointer interpreter coupled to the buffer memory that operates in a time sliced manner to identify overhead portions of the SONET/SDH framed data and a payload portion of the SONET/SDH framed data, the pointer interpreter comprising;

a first level pointer interpreter that operates in a time sliced manner;

a first memory coupled to the first level pointer interpreter the first memory to store data for the first level pointer interpreter;

a second level pointer interpreter coupled to the first level pointer interpreter, the second level pointer interpreter to operate in a time sliced manner; and

a second memory coupled to the second level pointer interpreter, the second memory to store data for the second level pointer interpreter;

wherein the buffer memory and pointer generator are located within the plurality of cross-connect cards;

wherein the first level pointer interpreter is configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads; and

wherein the second level pointer interpreter is configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3 VC-2 VC-12, VC-11, and combinations thereof.

2. The apparatus of claim 1 wherein the first level pointer interpreter writes, as a single word, to the first memory state information corresponding to a particular time slice.

3. The apparatus of claim 1 wherein the second level pointer interpreter writes, as a single word, to the second memory state information corresponding to a particular time slice.

4. The apparatus of claim 1 wherein the first level pointer interpreter operates on AU-level overhead of the SONET/SDH framed data.

5. The apparatus of claim 1 wherein the second level pointer interpreter operates on TU-level overhead of the SONET/SDH framed data.

16. The apparatus of claim 1 wherein the pointer generator remaps the received payload portions from a received STS frame structure to a destination STM frame structure or from a received STM frame structure to a destination STS frame structure, such that the apparatus operates as a SONET-SDH bridge.

6. A method, comprising:

providing a plurality of cards coupled via a backplane, the plurality of cards comprising;

a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;

a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using high speed connections; and

a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;

receiving multiple STS/STM frames of SONET/SDH data, each frame having an overhead portion and a payload portion;

identifying a portion of a first level overhead associated with the SONET/SDH framed data;

storing state information related to the first level overhead;

identifying a portion of a second level overhead associated with the SONET/SDH framed data;

storing state information related to the second level overhead;

identifying the payload portion of the multiple frames;

generating a plurality of aligned pointers in a time sliced manner, the pointers for use as overhead for the payload portions of the multiple frames when the payload portions are transmitted to an external destination, wherein generating a plurality of aligned pointers comprises a first level pointer interpreter configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads, and a second level pointer interpreter configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3, VC-2, VC-12, VC-11, and combinations thereof; and

remapping the payload portions from a first frame structure of the received STS/STM frames to a second frame structure based on the generated pointers;

wherein the identifying the overhead, identifying the payload, generating, and remapping steps are performed by the plurality of cross-connect cards.

7. The method of claim 6 wherein storing state information related to the first level overhead comprises writing, as a single word, state information corresponding to a particular time slice.

8. The method of claim 6 wherein storing state information related to the second level overhead comprises writing, as a single word, state information corresponding to a particular time slice.

9. The method of claim 6 wherein the first level overhead comprises AU-level overhead of the SONET/SDH framed data.

10. The method of claim 6 wherein the second level overhead comprises TU-level overhead of the SONET/SDH framed data.

17. The method of claim 6 wherein the remapping step remaps the payload portions from a first STS frame structure to a second STM frame structure or from a first STM frame structure to a second STS frame structure such that the method bridges between SDH and SONET.

11. A network switching component, comprising:

a plurality of cards coupled via a backplane, the plurality of cards comprising;

a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;

a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using high speed connections; and

a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;

an input network interface coupled to receive SONET/SDH framed data having a received STS/STM frame structure from an external source;

a pointer interpreter coupled to the input network interface, the pointer interpreter to identify overhead and payload portions of the received SONET/SDH framed data, the pointer interpreter comprising;

a first level pointer interpreter that operates in a time sliced manner;

a first memory coupled to the first level pointer interpreter, the first memory to store data for the first level pointer interpreter;

a second level pointer interpreter coupled to the first level pointer interpreter, the second level pointer interpreter to operate in a time sliced manner; and

a second memory coupled to the second level pointer interpreter, the second memory to store data for the second level pointer interpreter;

a memory coupled to the pointer interpreter, the memory to store the payload portion of the received SONET/SDH framed data;

a pointer generator coupled to the memory, the pointer generator to generate a plurality of aligned pointers for use as an overhead portion of a remapped SONET/SDH framed data having a destination STS/STM frame structure; and

an output network interface coupled to the pointer generator, the output network interface to output the remapped SONET/SDH framed data;

wherein the memory, pointer interpreter, and pointer generator are located within the plurality of cross-connect cards;

wherein the first level pointer interpreter is configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads; and

wherein the second level pointer interpreter is configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3, VC-2, VC-12, VC-11, and combinations thereof.

12. The network switching component of claim 11 wherein the first level pointer interpreter writes, as a single word, to the first memory state information corresponding to a particular time slice.

13. The network switching component of claim 11 wherein the second level pointer interpreter writes, as a single word, to the second memory state information corresponding to a particular time slice.

14. The network switching component of claim 11 wherein the first level pointer interpreter operates on AU-level overhead of the SONET/SDH framed data.

15. The network switching component of claim 11 wherein the second level pointer interpreter operates on TU-level overhead of the SONET/SDH framed data.

18. The network switching component to of claim 11 wherein the pointer generator generates the plurality of aligned pointers to remap the received frame structure from an STS frame structure to an STM frame structure or from an STM frame structure to an STS frame structure such that the network switching component operates as a SDH-SONET bridge.