Semiconductor storage device and method of controlling the same

• US 7,353,324 B2
• Filed: 08/26/2004
• Issued: 04/01/2008
• Est. Priority Date: 09/29/2003
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Tanaka, Yoshiyuki
• Primary Examiner(s): Padmanabhan; Mano
• Assistant Examiner(s): DINH, NGOC V
• Application Number:
  US10/926,141
• Publication Number:
  US 20050068802A1
• Time in Patent Office: 1,314 Days
• Field of Search: None
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0683 Plurality of storage devices
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 11/1657 Word-line or row circuits
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 2213/71 Three dimensional array
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect to the first and second nonvolatile memories.

Claims

1. A semiconductor storage device comprising:

a first nonvolatile memory to store user data of a file;

a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory;

a controller to control read/write of data with respect to the first and second nonvolatile memories; and

a conversion unit to perform data conversion to write data in the second nonvolatile memory with a bit width smaller than that of data outputted from the first nonvolatile memory, when data is transferred from the first nonvolatile memory to the second nonvolatile memory.

2. The semiconductor storage device according to claim 1, wherein the conversion unit includes a parallel/serial conversion circuit to perform parallel/serial conversion of data.

3. The semiconductor storage device according to claim 1, wherein the controller determines whether or not the second nonvolatile memory is performing a write operation or an erase operation, and executes a control to prevent a write operation into the first nonvolatile memory from occurring, when the second nonvolatile memory is performing the write operation or the erase operation.

4. A method of controlling a semiconductor storage device including a first nonvolatile memory and a second nonvolatile memory different in type from the first nonvolatile memory, comprising:

determining whether data requested to be written corresponds to management data of a file or user data;

writing data into the second nonvolatile memory, when data corresponds to the management data;

writing data into the first nonvolatile memory, when data corresponds to the user data; and

performing data conversion to write data in the second nonvolatile memory with a bit width smaller than that of data outputted from the first nonvolatile memory, when data is transferred from the first nonvolatile memory to the second nonvolatile memory.

5. The control method according to claim 4, wherein the data conversion includes a parallel/serial conversion of data.

6. The control method according to claim 4, further comprising:

determining whether or not the second nonvolatile memory is performing a write operation or an erase operation; and

executing a control to prevent a write operation into the first nonvolatile memory from occurring, when the second nonvolatile memory is performing the write operation or the erase operation.