Methods of forming semiconductor devices with high-k gate dielectric
First Claim
1. A method of fabricating an integrated circuit comprising:
- forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material, and the first gate dielectric portion having a first equivalent silicon oxide thickness; and
forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising the first high-permittivity dielectric material, and the second gate dielectric portion having a second equivalent silicon oxide thickness, wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
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Abstract
A method of fabricating an integrated circuit is provided. A first gate dielectric portion is formed on a substrate in a first transistor region. The first gate dielectric portion includes a first high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. A second gate dielectric portion is formed on the substrate in a second transistor region. The second gate dielectric portion includes the first high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
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Citations
28 Claims
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1. A method of fabricating an integrated circuit comprising:
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forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material, and the first gate dielectric portion having a first equivalent silicon oxide thickness; and forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising the first high-permittivity dielectric material, and the second gate dielectric portion having a second equivalent silicon oxide thickness, wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of fabricating an integrated circuit comprising:
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forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material; and forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. A method of fabricating an integrated circuit comprising:
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forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material, and the first gate dielectric portion having a first equivalent silicon oxide thickness; and forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising a second high-permittivity dielectric material, the second high-permittivity dielectric material being different than the first high-permittivity dielectric material, and the second gate dielectric portion having a second equivalent silicon oxide thickness, wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
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Specification