Error correction for multi-level cell memory with overwrite capability
First Claim
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1. A method comprising:
- selectively storing data in a memory array at different densities per cell; and
implementing error correction depending on the density of data storage;
wherein implementing error correction depending on the density of data storage includes determining whether data is in a higher or lower density mode; and
if the data is in a higher density mode, implementing error correction code; and
if the data is in a lower density mode, omitting error correction code.
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Abstract
A multi-level cell memory that includes storing data in multiple cell densities is disclosed. The multi-level cell memory selectively includes error correction code. The multi-level cell memory may also include splitting cells into higher bits and lower bits in codewords.
91 Citations
44 Claims
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1. A method comprising:
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selectively storing data in a memory array at different densities per cell; and implementing error correction depending on the density of data storage; wherein implementing error correction depending on the density of data storage includes determining whether data is in a higher or lower density mode; and if the data is in a higher density mode, implementing error correction code; and if the data is in a lower density mode, omitting error correction code. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An article comprising a medium storing instructions that, if executed, enable a processor-based system to:
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selectively store data in a memory array at different densities per cell; and implement error correction depending on the density of data storage; wherein to implement error correction depending on the density of data storage includes determining whether data is in a higher or lower density mode; and if the data is in a higher density mode, implement error correction; and if the data is in a lower density mode, omit error correction. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A memory comprising:
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a memory array; and a controller coupled to said memory array to selectively store data in the memory array at different densities per cell and to implement error correction depending on the density of data storage; wherein said controller to determine whether data is in a higher or lower density mode and if the data is in a higher density mode, implements error correction and if the data is in a lower density mode, omits error correction. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34)
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35. A system comprising:
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a processor; a wireless interface;
a memory coupled to said processor; anda controller coupled to said memory to selectively store data in said memory at different densities per cell and to implement error correction depending on a density of data storage; wherein said controller to determine whether data is in a higher or lower density mode and if the data is in a higher density mode, implements error correction and if the data is in a lower density mode, omits error correction. - View Dependent Claims (36, 37, 38, 39, 40, 41, 42, 43, 44)
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Specification