Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage
First Claim
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1. A switched capacitor amplifier circuit comprising:
- an operational amplifier having a first input terminal and a second input terminal;
a first sampling capacitor being connected between an input signal and said first input terminal in a first phase; and
a first reference capacitor being coupled between said first input terminal and a reference voltage in said first phase, said first reference capacitor being connected between said first input terminal and a non-zero voltage in a second phase.
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Abstract
Equal common mode voltage is present at the input terminals of an operational amplifier with amplifies the residue signal in a stage of an ADC in two phases while reducing the noise introduced into the amplified signal. A reference capacitor is coupled between an input terminal of the operational amplifier and a reference voltage in a first phase, and between the input terminal and a the reference voltage but with opposite polarity in the second phase.
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Citations
12 Claims
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1. A switched capacitor amplifier circuit comprising:
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an operational amplifier having a first input terminal and a second input terminal; a first sampling capacitor being connected between an input signal and said first input terminal in a first phase; and a first reference capacitor being coupled between said first input terminal and a reference voltage in said first phase, said first reference capacitor being connected between said first input terminal and a non-zero voltage in a second phase. - View Dependent Claims (2, 3, 4, 5)
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6. A device comprising:
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a processor processing a plurality of digital values; a switched capacitor amplifier circuit receiving an input signal and generating an amplified signal, each of said plurality of digital values being generated from said amplified signal, said switched capacitor amplifier circuit comprising; an operational amplifier having a first input terminal and a second input terminal; a first sampling capacitor being connected between an input signal and said first input terminal in a first phase; and a first reference capacitor being coupled between said first input terminal and a reference voltage in said first phase, said first reference capacitor being connected between said first input terminal and a non-zero voltage in a second phase. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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Specification