Discrete clock generator and timing/frequency reference
First Claim
1. An integrated circuit comprising:
- an oscillator comprising an inductor and a capacitor, the oscillator adapted to provide a first reference signal having a first frequency, the oscillator further adapted to operate without locking to an external reference signal;
a voltage controller adapted to provide a plurality of voltage control signals;
a plurality of switchable, controlled reactance modules coupled to the oscillator and tote voltage controller, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency; and
an output circuit adapted to provide an output interface for signal communication.
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Accused Products
Abstract
In various embodiments, the invention provides a discrete clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which may then be provided to other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.
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Citations
51 Claims
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1. An integrated circuit comprising:
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an oscillator comprising an inductor and a capacitor, the oscillator adapted to provide a first reference signal having a first frequency, the oscillator further adapted to operate without locking to an external reference signal; a voltage controller adapted to provide a plurality of voltage control signals; a plurality of switchable, controlled reactance modules coupled to the oscillator and tote voltage controller, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency; and an output circuit adapted to provide an output interface for signal communication. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. An integrated circuit comprising:
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a harmonic oscillator comprising an inductor and a capacitor, the harmonic oscillator adapted to provide a first reference signal having a first frequency; a plurality of controlled reactance modules coupled to the harmonic oscillator, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a control voltage of a plurality of control voltages to modify the first frequency; a first coefficient register adapted to store a first plurality of switching coefficients; a first plurality of switches coupled to the plurality of controlled reactance modules, each switch of the first plurality of switches responsive to a corresponding switching coefficient of the fast plurality of switching coefficients to couple a selected control voltage of the plurality of control voltages to a corresponding controlled reactance module; a first divider coupled to the harmonic oscillator, the first divider adapted to provide a second reference signal at a second frequency; and a plurality of locking circuits coupled to the first divider, the plurality of locking circuits adapted to lock to the second reference signal and provide a corresponding plurality of third reference signals having a plurality of corresponding third frequencies, each third frequency of the plurality of corresponding third frequencies determined from the second frequency and a divide ratio of the corresponding locking circuit of the plurality of locking circuits. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46)
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47. A configurable integrated circuit comprising:
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an oscillator comprising an inductor, a capacitor, and a transconductance amplifier, the oscillator adapted to provide a first reference signal having a first frequency, the oscillator further adapted to operate without locking to an external reference signal, the transconductance amplifier further comprising a variable current source adapted to provide a corresponding current in response to operating temperature; a voltage controller adapted to provide a plurality of voltage control signals; a plurality of switchable, controlled reactance modules coupled to the oscillator and to the voltage controller, each reactance module of the plurality of reactance modules adapted to provide a selected reactance in response to a corresponding voltage control signal of the plurality of voltage control signals to modify the first frequency; a first divider coupled to the harmonic oscillator, the first divider adapted to provide a second reference signal at a second frequency; and a plurality of configurable locking circuits coupled to the first divider, the plurality of locking circuits adapted to lock to the second reference signal and provide a corresponding plurality of third reference signals having a plurality of corresponding third frequencies, each third frequency of the plurality of corresponding third frequencies determined from the second frequency and a configurable divide ratio of the corresponding locking circuit of the plurality of locking circuits. - View Dependent Claims (48, 49, 50, 51)
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Specification