Multiband GNSS receiver

• US 7,358,896 B2
• Filed: 10/30/2006
• Issued: 04/15/2008
• Est. Priority Date: 11/03/2005
• Status: Expired due to Fees

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Nemerix, SA
• Inventors: Gradincic, Zlatan, Materni, Roberto, Piazza, Francesco, Orsatti, Paolo
• Primary Examiner(s): PHAN, DAO LINDA
• Application Number:
  US11/589,607
• Publication Number:
  US 20070096980A1
• Time in Patent Office: 533 Days
• Field of Search: 342/357.02, 342/357.06, 342/357.12, 342/357.13, 701/213, 701/215
• US Class Current: 342/357.72
• CPC Class Codes: G01S 19/32 Multimode operation in a single same satellite system, e.g. GPS L1/L2
• CPC Class Codes: G01S 19/33 Multimode operation in different systems which transmit time stamped messages, e.g. GPS/GLONASS
• CPC Class Codes: G01S 19/35 Constructional details or hardware or software details of the signal processing chain

Abstract

RF receiver for GNSS signals, (e.g., GPS, Galileo, Glonass), composed of a single chip and a low number of external components, has a number of independent signal paths each including a separate IF stage and baseband down-converter. Each signal path is tuned to a specific IF band by selection of external IF filters. Conversion to IF involves a common local carrier generator.

Claims

1. A receiver for navigation satellites comprising:

a plurality of signal paths, each path being adapted for the reception of a determined satellite radio signal associated with a carrier frequency and a bandwidth; and

a local carrier source for providing a common local carrier signal to the receiver;

each signal path comprising;

a first down-conversion stage, in which the satellite radio signal is combined with the signal of the local carrier source for conversion into an intermediate frequency signal; and

a second down-conversion stage, in which the intermediate signal is converted into a low-frequency signal, wherein

each of the second down-conversion stages of each signal path comprises a further local oscillator and control means for synchronizing the further local oscillator to a main clock signal of the receiver.

2. The receiver of claim 1, wherein each signal path further comprises at least one intermediate frequency amplifier, and wherein the intermediate frequency amplifiers and the first and second down-conversion stages of the signal paths are comprised in a monolithic integrated circuit.

3. The receiver of claim 2, wherein the signal paths further comprise RF-filters for the satellite radio signals and/or intermediate-frequency filters for the intermediate frequency signal.

4. The receiver of claim 3, wherein the RF-filters and/or the intermediate-frequency filters are external to the integrated circuit.

5. The receiver of claim 4, wherein the frequency of the local carrier signal is chosen at the middle point of the frequency span comprising the satellite radio signals.

6. The receiver of claim 3, wherein each signal path can be tuned to a specific satellite radio signals by dimensioning the RF-filters and/or the intermediate-frequency filters.

7. The receiver of claim 1, characterized by the fact that each signal path has a intermediate frequency stage tuned to a different intermediate frequency than the intermediate frequency stages of the other signal paths.

8. The receiver of claim 1, wherein each intermediate frequency stage of each signal path is tuned to a determined IF band by selecting the values components external to the RF chip.

11. The receiver of claim 1, wherein the second down-conversion stage is arranged to convert the intermediate signal into a baseband signal.

9. Radio-frequency processing semiconductor chip comprising:

a plurality of signal paths, each path being adapted for the reception of a determined satellite radio signal associated with a carrier frequency and a bandwidth; and

a local carrier source for providing a common local carrier signal to a receiver, wherein each signal path comprises;

a first down-conversion stage, in which the satellite radio signal is converted into an intermediate frequency signal, and

a second down-conversion stage, in which the intermediate signal is converted into a low-frequency signal by mixing with the common local carrier signal, wherein,

the second down-conversion stage of each signal path comprises a further local oscillator, and control means for synchronizing the further local oscillator to a main clock signal of the receiver;

wherein the semiconductor chip further comprises, for each signal path, external component connection pins, to which at least one external component can be connected, the frequency response of each signal path being dependent on the choice of the at least one external component.

10. The radio-frequency processing semiconductor chip of claim 9, comprising a local carrier source for providing a common local carrier signal to the receiver, and an intermediate frequency stage in each signal path, wherein the external component connection pins are arranged for inserting tuned filters in each intermediate frequency stage of each signal path, whereby each intermediate frequency stage is tuned to a determined IF band.

12. The Radio-frequency processing semiconductor chip of claim 9, wherein the second down-conversion stage is arranged to convert the intermediate signal into a baseband signal.

13. A receiver for navigation satellites comprising:

a plurality of signal paths, each path being adapted for the reception of a determined satellite radio signal associated with a carrier frequency and a bandwidth;

a local carrier source for providing a common local carrier signal to the receiver;

each signal path comprising;

a first down-conversion stage, in which the satellite radio signal is combined with the signal of the local carrier source for conversion into an intermediate frequency signal, the local carrier signal being set at the middle point of the frequency span comprising the satellite radio signals;

at least one intermediate frequency stage, comprising an intermediate-frequency amplifier;

a second down-conversion stage, in which the intermediate signal is converted into a pair of baseband quadrature signals, wherein

the intermediate frequency amplifiers and the first and second down-conversion stages of the signal paths are comprised in a monolithic integrated circuit, and each of the second down-conversion stages of each signal path comprises a further local oscillator, and control means for synchronizing the further local oscillator to a main clock signal of the receiver,

the receiver further comprising one or both of;

RF-filters provided external to the monolithic integrated circuit for the satellite radio signals, and intermediate-frequency filters provided external to the monolithic integrated circuit for the intermediate frequency signal, wherein

the intermediate-frequency filters are designed to tune each intermediate frequency stage of each signal path to a different intermediate frequency than the intermediate frequency stage of other signal paths.