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Robust calculation of crosstalk delay change in integrated circuit design

  • US 7,359,843 B1
  • Filed: 12/12/2003
  • Issued: 04/15/2008
  • Est. Priority Date: 09/19/2003
  • Status: Active Grant
First Claim
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1. A computer implemented method of determining aggressor-induced delay change in a victim net of a stage of an integrated circuit design, the stage including a victim net driver gate, a receiver gate and an interconnect network including a victim net and an aggressor net, comprising:

  • providing an input and output voltage dependent current model of the victim net driver gate;

    producing a model of a load presented to an output of the driver gate by the interconnect network;

    producing a model of the interconnect network of the stage, which can be used to propagate a waveform from an output of the driver gate to an input of the receiver gate;

    simulating behavior of the victim net during nominal (noiseless) transition by performing steps including,providing a signal transition at an input of the driver gate;

    using the current model of the driver gate and the load model of the interconnect network to produce a nominal driver gate output waveform resulting from the provided input signal transition; and

    using the interconnect model to propagate the nominal driver gate output waveform from the driver gate output to the receiver gate input;

    simulating behavior of the victim net during noisy transition by performing steps including,providing a signal transition at an input of the driver gate;

    providing an aggressor-induced current waveform to an output of the driver gate;

    using the current model of the driver gate and the load model of the interconnect network to produce a noisy driver gate output waveform resulting from the provided input signal transition and the aggressor-induced current waveform; and

    using the interconnect model to propagate the noisy driver gate output waveform from the driver gate output to the receiver gate input;

    providing an aggressor-induced voltage waveform to an input of the receiver gate;

    producing a value representing a difference between delay associated with the simulated noiseless transition and delay associated with the simulated noisy transition; and

    saving the produced value in computer readable memory.

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