RF semiconductor devices and methods for fabricating the same
First Claim
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1. A method for fabricating an RF semiconductor device comprising:
- forming a trench to define an active region and an element isolation region in a semiconductor substrate;
forming a plurality of gate lines within the active region of the semiconductor substrate, the plurality of gate lines running perpendicularly to the trench and not extending over a center of the trench;
forming an insulating layer on the plurality of gate lines and the semiconductor substrate;
forming contact holes in the insulating layer over the active region using a single pattern, wherein a first group of the contact holes exposes portions of the gate lines and a second group of the contact holes exposes portions of the substrate in the active region;
forming contact plugs in each of the contact holes; and
forming a conductive pattern layer over the insulating layer that is electrically connected with the contact plugs.
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Abstract
RF semiconductor devices and methods of making the same are disclosed. In a disclosed method, a trench for defining an active region and an element isolation region is formed in a semiconductor substrate. One or more gate lines is then formed within the active region. Next, an insulating layer is formed on the semiconductor substrate and the gate lines. Contact holes are then formed in the insulating layer. Contact plugs are then formed in the contact holes. Thereafter, a conductive pattern is electrically connected with the contact plugs.
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Citations
18 Claims
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1. A method for fabricating an RF semiconductor device comprising:
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forming a trench to define an active region and an element isolation region in a semiconductor substrate; forming a plurality of gate lines within the active region of the semiconductor substrate, the plurality of gate lines running perpendicularly to the trench and not extending over a center of the trench; forming an insulating layer on the plurality of gate lines and the semiconductor substrate; forming contact holes in the insulating layer over the active region using a single pattern, wherein a first group of the contact holes exposes portions of the gate lines and a second group of the contact holes exposes portions of the substrate in the active region; forming contact plugs in each of the contact holes; and forming a conductive pattern layer over the insulating layer that is electrically connected with the contact plugs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification