Gate driver, motor driving device including the gate driver, and apparatus equipped with the motor driving device

• US 7,362,061 B2
• Filed: 10/21/2003
• Issued: 04/22/2008
• Est. Priority Date: 12/20/2002
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Sakurama, Kazuaki, Yasohara, Masahiro, Kameda, Koji
• Primary Examiner(s): Donovan; Lincoln
• Assistant Examiner(s): MCCLOUD, RENATA D
• Application Number:
  US10/690,061
• Publication Number:
  US 20040135528A1
• Time in Patent Office: 1,645 Days
• Field of Search: None
• US Class Current: 318/254.2
• CPC Class Codes: H03K 17/04123 in field-effect transistor switches
• CPC Class Codes: H03K 17/163 Soft switching

Abstract

A gate driver for forcing a power transistor including a gate electrode insulated with oxide film into conduction or shut-off, the gate driver includes a first current source for outputting a first current value to raise an electric potential of the gate electrode for changing shut-off state of the power transistor to conductive state; and a second current source for outputting a second current value to lower the electric potential of the gate electrode for changing the conductive state of the power transistor to the shut-off state. The first current value and the second current value are assigned based on at least one kind of current-source control information. This structure allows preparing an appropriate speed of forcing the power transistor into conduction or shut-off with a small number of elements, and the gate driver can be used with ease for driving power transistors having different output sizes.

Claims

1. A gate driver for forcing a power transistor having a gate electrode insulated with oxide film and also having an input capacitance between the gate electrode and the source electrode, into a conductive state or a shut-off state, the gate driver comprising:

a first current source configured to receive a first control signal and to output a first current value to charge said input capacitance and raise an electric potential of the gate electrode in a time corresponding to a charging time of said input capacitance, when changing the power transistor from the shut-off state to the conductive state, the first current value depending on a level of the first control signal; and

a second current source configured to receive a second control signal and to output a second current value to discharge said input capacitance and lower the electric potential of the gate electrode in a time corresponding to the charging time of said input capacitance, when changing said power transistor from the conductive state to the shut-off state, the second current value depending on a further level of the second control signal;

wherein the respective levels of the first control signal and the second control signal are independently controllable,

and wherein the time of change from the shut-off state to the conductive state of the power transistor is controlled by controlling the rise time of the electric potential of said gate electrode with the first current value set with the first control signal, while the time of change from the conductive state to the shut-off state of the power transistor is controlled by controlling the fall time of the electric potential of said gate electrode with said second current value set with the second control signal.

3. The gate driver of claim 1, wherein the first current source and the second current source are formed by at least a monolithic integrated circuit, and at least one piece of current-source control information supplied from outside of the monolithic integrated circuit assigns the first current value and the second current value.

5. The gate driver of claim 1, wherein the current-source control information is fed into two input terminals that receive a gate-driver control signal, and each one of the input terminals is coupled with a passive element which assigns the first and the second current values respectively.

7. The gate driver of claim 1, wherein the current-source control information is fed into only one input terminal, which receives a gate-driver control signal, coupled to a passive elements, and a ratio of the first current value vs. the second current value is predetermined, so that a value of the passive element assigns either one of the first or the second current value.

9. The gate driver of claim 3, wherein the current-source control information is fed into at least one input terminal that receives a gate-driver control signal, and the current-source control information is communication information supplied from outside of the gate driver, and the first and the second current values are assigned based on the communication information.

2. A gate driver to be coupled to a gate electrode and a source electrode of a power transistor including the gate electrode insulated with oxide film, the gate driver comprising:

a coupler to be coupled to outside of the gate driver, the coupler including a connecting section to the gate electrode, a connecting section to the source electrode, and a cluster of input terminals for receiving a gate-driver control signal; and

an interior structure including a first current source, a second current source, a gate circuit which is a NOT circuit, and a current assignor,

wherein the first current source and the second current source are assigned their current values by an output signal supplied from the current assignor, and their outputs are controlled by a switch-control signal supplied via one of the input terminals that receive a gate-driver control signal,

wherein the current assignor receives at least one kind of current-source control information via each one of the input terminals except the one through which the switch-control signal is supplied, and a group of output signals of the current assignor are controlled based on the current-source control information;

wherein the gate circuit, which is a NOT circuit, inverts the switch-control signal that controls the second current source;

wherein a first terminal of the first current source is coupled to a power supply of the gate driver, and a second terminal of the first current source is coupled to a first terminal of the second current source, and a second terminal of the second current source is coupled to the source electrode of the power transistor via the connecting section to the source electrode;

wherein a junction point of the second terminal of the first current source and the first terminal of the second current source is coupled to the gate electrode of the power transistor via the connecting section to the gate electrode;

wherein the first current value to be supplied from the first current source is assigned based on a portion of the current-source control information and the second current value to be supplied from the second current source is assigned based on a further portion of the current-source control information,

in a case of the switch-control signal being a high level signal, the first current source outputs the first current value and the second current source is electrically opened and does not output the second current value, and the first current value is fed into the gate electrode of the power transistor for becoming a charging current of input capacitance of the power transistor, and the charge by the charging current to input capacitance raises a voltage between the gate electrode and the source electrode of the power transistor up to a threshold voltage, then conduction becomes available between a drain electrode of the power transistor and the source electrode, and a time needed for changing a shut-off state of the power transistor to a conductive state is controlled based on a group of the current-source control information,

in a case of the switch-control signal being a low level signal, the first current source is electrically opened and does not output the first current value and the second current source outputs the second current value, so that electron charges charged in the input capacitance of the power transistor become a discharging current to the first terminal of the second power source, and the discharge due to the discharging current from the input capacitance lowers the voltage between the gate electrode and the source electrode of the power transistor down to a threshold voltage, then the drain electrode and the source electrode of the power transistor are forced to be shut-off, and a time needed for changing the conductive state of the power transistor to the shut-off state is controlled based on the group of current-source control information.

4. The gate driver of claim 2, wherein the first current source and the second current source are formed by at least a monolithic integrated circuit, and at least one piece of current-source control information supplied from outside of the monolithic integrated circuit assigns the first current value and the second current value.

6. The gate driver of claim 2, wherein the current-source control information is fed into two input terminals of the cluster of input terminals that receive a gate-driver control signal, and each one of the input terminals is coupled with a passive element which assigns the first and the second current values respectively.

8. The gate driver of claim 2, wherein the current-source control information is fed into only one input terminal, which receives a gate-driver control signal, coupled to a passive elements, and a ratio of the first current value vs. the second current value is predetermined, so that a value of the passive element assigns either one of the first or the second current value.

10. The gate driver of claim 4, wherein the current-source control information is fed into at least one input terminal that receives a gate-driver control signal, and the current-source control information is communication information supplied from outside of the gate driver, and the first and the second current values are assigned based on the communication information.