Apparatus and method for digital phase control of a pulse width modulation generator for microprocessor/DSP in integrated circuits

• US 7,362,152 B2
• Filed: 03/03/2005
• Issued: 04/22/2008
• Est. Priority Date: 03/24/2004
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Figoli, David A.
• Primary Examiner(s): NGUYEN, LINH M
• Application Number:
  US11/071,027
• Publication Number:
  US 20050213654A1
• Time in Patent Office: 1,146 Days
• Field of Search: 327172-176, 327/178, 323/282, 331/57, 341/51, 341/155, 363/39, 363/41, 363/98, 375/238
• US Class Current: 327/172
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation
• CPC Class Codes: H04L 25/4902 Pulse width modulation; Pulse position modulation

Abstract

In a digital pulse width modulation generator unit, a phase register is coupled to the clocked counter providing the generator unit time base. In response to a control signal, the contents of the phase register over-write the present counter, thereby changing the phase of pulse width modulated generator output signal. When a plurality of pulse width modulated generator units, the phases of the units can be controlled relative to a reference generator. The contents of the phase register can be altered by hardware or by software.

Claims

1. A digital PWM generator unit, the unit comprising;

a counter responsive to a system clock, the counter providing a time base for PWM output signals;

a first register having a first value stored therein;

a first comparator, the first comparator having the first value applied to a first input terminal thereof and a count from the counter applied to a second input terminal thereof, a reset signal being generated by the first comparator when the first value and the count are equal;

the reset signal setting the counter to zero;

a second register having a second value stored therein;

a second comparator, the second comparator having the count applied to a first input terminal and the second value applied to a second terminal, the second comparator providing a set signal when the count and the second value are equal; and

a phase register coupled to the counter, the phase register having a third value stored therein;

the third value over-writing the current counter value in response to a control signal.

2. The unit as recited in claim 1 wherein over-writing the contents of the counter changes the phase of the PWM output signals.

3. The unit as recited in claim 2 wherein the contents of phase register are determined by a software program.

4. A digital PWM generator system, the system comprising;

a digital PWM generator unit, the unit including;

a counter responsive to system clock signals, the counter providing a time base for PWM output signals; and

a phase register coupled to the counter, the contents of the phase register over-writing the current counter value in response to a control signal; and

a reference PWM generator unit coupled to the unit, the reference PWM generator unit not having a phase register coupled to the counter, the reference PWM generator unit providing the control signal to the counter of the first unit.

5. The system as recited in claim 4 wherein the contents of the phase register determine the phase relationship between an output signal of the unit and an output signal of the reference PWM generator unit.

6. The system as recited in claim 5 further comprising at least a second unit and a second counter, the second unit having a phase register coupled to the second counter, the second counter responsive to a control signal from the reference PWM generator unit to over-write the contents of the second unit counter with the contents of the coupled phase register.

7. The system as recited in claim 6 wherein the reference PWM generator unit, the first unit, and the second unit are part of multi-phase power stage.

8. The system as recited in claim 7 wherein the system can be dynamically reconfigured to remove and to add a PWM generator unit.

9. The system as recited in claim 5 wherein the reference PWM generator unit and the first unit form a zero voltage switched full power stage.

10. The method of controlling a phase of a first PWM generator unit, the method comprising:

counting signals from a system clock in a counter unit;

in a first comparator unit, generating a set signal when the count in the counter unit is equal to a first preselected value;

in a second comparator unit, generating a reset signal when the count in the counter unit is equal to a second preselected value; and

with a third value in a phase register coupled to the counter, over-writing the current contents of the counter unit in response to a control signal, the third value controlling the time between the set signal and the reset signal.

11. The method as recited in claim 10 further comprising controlling the phase of the first PWM generator unit relative to a reference PWM generator unit by not providing the reference PWM generator unit a phase register, the reference PWM generator unit generating the control signal.

12. The method as recited in claim 11 further comprising determining the third value of the phase register by a software program.

13. The method as recited in claim 12 wherein the reference PWM generator unit and the first unit form a zero voltage switched full power stage.

14. The method as recited in claim 12 further comprising:

adding a second PWM generator unit; and

controlling the phase of the second unit by a value stored in a second unit phase register for over-writing a second unit counter in response to a control signal.

15. The method as recited in claim 14 wherein the reference PWM generator unit, the first unit and the second unit form at least a part of a multi-phase power stage.

16. The method as recited in claim 15 further comprising:

adding a PWM generator unit including a phase register to the power stage when power requirements for the power stage increase above a first predetermined level; and

removing a PWM generator from the power stage when the power requirements for the power stage decrease below a second predetermined level.

17. A system including a plurality of digital PWM generator units, the units comprising:

a counter responsive to a system clock, the counter providing a time base signal, one unit being designated as a reference unit;

a phase register storing a phase value, the phase register coupled to the counter of each unit except the reference unit;

a period register storing a value determining a unit reset point;

a compare register storing value determining a unit set point; and

an output unit responsive to the counter, the period register and the compare register, the output unit providing a periodic output signal;

wherein the reference unit generates a control signal, the control signal causing the phase register value to over-write a current counter value.

18. The system as recited in claim 17 wherein the phase register value determines the phase of the PWM generator unit output signals relative to output signals of the reference unit.