Liquid crystal display having gate driver IC chip COG-mounted on glass substrate

• US 7,362,403 B2
• Filed: 01/28/2005
• Issued: 04/22/2008
• Est. Priority Date: 01/30/2004
• Status: Expired due to Fees

• Current Assignee: Funai Electric Co., Ltd. (Funai Electric Holdings Company Limited)
• Original Assignee: Funai Electric Co., Ltd. (Funai Electric Holdings Company Limited)
• Inventors: Uehara, Takuya
• Primary Examiner(s): PIZARRO CRESPO, MARCOS D
• Application Number:
  US11/045,809
• Publication Number:
  US 20050189594A1
• Time in Patent Office: 1,180 Days
• Field of Search: 349149-152, 257/59, 257/72, 257/E33.055, 345204-206
• US Class Current: 349/150
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body

Abstract

Source driver IC chips 3 are mounted on flexible substrates 7a and 7b. A source input pattern, to which a source driver signal is inputted, and a source output pattern, from which a source drive signal is outputted, are formed on the flexible substrates 7a and 7b. An end portion of the source input pattern is connected to a printed circuit board 5. Moreover, an end portion of the source output pattern is connected to a glass substrate 2. A gate driver transmission pattern for transmitting gate driver signals, which are outputted from a signal processing IC 4, to the glass substrate 2 is formed on the flexible substrate 7a. In this liquid display apparatus, a gate driver IC chip 6, which is formed by using monocrystalline silicon and has a gate driver circuit integrated thereon, is COG-mounted on the glass substrate 2.

Claims

1. A liquid crystal display comprising:

a display panel portion having a glass substrate on which pixel electrodes are formed and on which thin film transistors respectively associated with the pixel electrodes are formed by amorphous silicon;

a gate driver IC chip formed by monocrystalline silicon, and in which a gate driver circuit that generates gate drive signals for driving gates of the thin film transistors, is integrated;

a source driver IC chip in which a source driver circuit that generates source drive signals for driving sources of the thin film transistors, is integrated;

a signal processing IC, in which at least a display controller for generating and outputting gate driver signals that are inputted to the gate driver circuit, and source driver signals that are inputted to said source driver IC chip, is integrated;

a printed circuit board on which the signal processing IC is mounted;

a flexible substrate on which the source driver IC chip is mounted, the flexible substrate on which a source input pattern to which the source driver signals are inputted, and a source output pattern from which the source drive signals are outputted, are formed, so that an end portion of the source input pattern is connected to the printed circuit board, and that an end portion of the source output pattern is connected to the glass substrate,

wherein a gate driver transmission pattern for transmitting gate driver signals that are outputted from the signal processing IC to the glass substrate is formed on the flexible substrate,

wherein the gate driver IC chip is COG-mounted on the glass substrate,

wherein a unit input pattern portion and a unit output pattern portion are formed on the flexible substrate, the unit input pattern portion electrically connected to a printed-circuit-board-side pattern that is formed on the printed circuit board through an anisotropic conductive film, and the unit output pattern portion electrically connected to a glass-substrate-side pattern that is formed on the glass substrate through an anisotropic conductive film,

wherein each of the gate driver transmission patterns is constituted by one unit input pattern portion, one unit output pattern portion, and a connecting pattern portion for connecting the one unit input pattern portion to the one unit output pattern portion, and

wherein a power supply pattern serving as a path for DC power inputted to the gate driver circuit is constituted by a unit connecting pattern portion having one signal path and formed on the flexible substrate, plural unit input pattern portions connected to the unit connecting pattern portion, and plural unit output pattern portions connected to the unit connecting pattern portion.