×

Method and apparatus for changing parallel clock signals in a digital data transmission

  • US 7,366,091 B1
  • Filed: 03/30/2000
  • Issued: 04/29/2008
  • Est. Priority Date: 04/01/1999
  • Status: Expired due to Term
First Claim
Patent Images

1. A method comprising:

  • selecting a primary transmission path;

    calculating a check sum for the data flow of a length of a processed section of the data flow, said check sum being added to the processed section of the data flow in order to form a data frame to be transmitted;

    transmitting the data frame in at least two transmission paths that include the primary transmission path;

    correcting correctable errors in received data frames and calculating an error sum for each of the at least two transmission paths;

    comparing the error sum of one of the transmission paths with an error sum of another of the at least two transmission paths and changing to the transmission path with the smaller error sum;

    changing a clock signal to the transmission path with the smaller error sum after waiting for sufficiently accurate cophasal clock signals; and

    forwarding data of the processed section of the data flow from the transmission path with the smaller error sum to an output cable.

View all claims
  • 10 Assignments
Timeline View
Assignment View
    ×
    ×