Training pattern for a biased clock recovery tracking loop
First Claim
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1. A method for a biased clock recovery tracking loop comprising:
- receiving header information in a training sequence;
receiving control information in the training sequence;
receiving a clock training pattern in the training sequence; and
decoding data encoded in the control information while deriving a clock from the training sequence wherein receiving the control information further comprises;
receiving a first sequence of data, the first sequence of data alternating between a first state and a second state; and
receiving a second sequence of data, the second sequence of data alternating between a constant state and one of a plurality of portions of the encoded data.
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Abstract
Some embodiments of the invention provide a biased tracking loop that may include encoded information. Embodiments may comprise a training pattern, utilized in a non-interfering way that allows for clock recovery, embedded information transmission and/or header alignment. Therefore, embodiments may comprise a tracking loop training pattern that comprises data.
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Citations
13 Claims
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1. A method for a biased clock recovery tracking loop comprising:
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receiving header information in a training sequence; receiving control information in the training sequence; receiving a clock training pattern in the training sequence; and decoding data encoded in the control information while deriving a clock from the training sequence wherein receiving the control information further comprises; receiving a first sequence of data, the first sequence of data alternating between a first state and a second state; and receiving a second sequence of data, the second sequence of data alternating between a constant state and one of a plurality of portions of the encoded data. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An apparatus comprising:
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a link to receive a training sequence containing encoded data; and a circuit coupled with the link, the circuit to recover clocking information and the encoded data from the training sequence with a biased clock recovery tracking loop wherein; the training sequence includes a header, control information, and a clock training pattern; and the control information includes; a first sequence of data, the first sequence of data alternating between a first state and a second state; and a second sequence of data, the second sequence of data alternating between a constant state and one of a plurality of portions of the encoded data. - View Dependent Claims (8)
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9. A host controller comprising:
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a link to send a training sequence containing encoded data; and a circuit coupled with the link, the circuit to provide clocking information in a training sequence and to encode data in the training sequence wherein; the training sequence includes a header, control information, and a clock training pattern; and the circuit is configured to encode the control information such that the control information includes; a first sequence of data, the first sequence of data alternating between a first state and a second state; and a second sequence of data, the second sequence of data alternating between a constant state and one of a plurality of portions of the encoded data. - View Dependent Claims (10, 13)
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11. A system comprising:
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a general purpose processor; and a host controller coupled with the general purpose processor, the host controller comprising; a link to send a training sequence containing encoded data; and a circuit coupled with the link, the circuit to provide clocking information in a training sequence to encode data in the training sequence wherein; the training sequence includes a header, control information, and a clock training pattern; and the circuit is configured to encode the control information such that the control information includes; a first sequence of data, the first sequence of data alternating between a first state and a second state; and a second sequence of data, the second sequence of data alternating between a constant state and one of a plurality of portions of the encoded data. - View Dependent Claims (12)
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Specification