Wiring board manufacturing method

• US 7,370,411 B2
• Filed: 03/10/2006
• Issued: 05/13/2008
• Est. Priority Date: 03/15/2005
• Status: Active Grant

• Current Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Original Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Inventors: Yamano, Takaharu
• Primary Examiner(s): Arbes; Carl J.
• Application Number:
  US11/373,610
• Publication Number:
  US 20060207088A1
• Time in Patent Office: 795 Days
• Field of Search: 298/25, 298/30, 298/32, 298/40, 298/52
• US Class Current: 29/832
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/5386 Geometry or layout of the interconnection structure
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H05K 1/0271 : Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
• CPC Class Codes: H05K 1/185 : Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/2009 : Reinforced areas, e.g. for a specific part of a flexible printed circuit
• CPC Class Codes: H05K 2203/016 : Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
• CPC Class Codes: H05K 3/007 : Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier H05K1/187, H05K3/20 and H05K3/4682 take precedence
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49144 : by metal fusion
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 : by forming conductive walled aperture in base

Abstract

A method of manufacturing a wiring board includes: forming a first insulating layer on a supporting board; mounting at least one reinforcing member on the first insulating layer; mounting at least one semiconductor chip on the first insulating layer; forming a second insulating layer on the reinforcing member and the semiconductor chip; and forming a wiring on the second insulating layer, the wiring being connected to the semiconductor chip.

Claims

1. A method of manufacturing a wiring board, said method comprising:

forming a first insulating layer on a supporting board;

mounting at least one reinforcing member on the first insulating layer;

mounting at least one semiconductor chip on the first insulating layer;

forming a second insulating layer on the reinforcing member and the semiconductor chip; and

forming a wiring on the second insulating layer, the wiring being connected to the semiconductor chip.

2. The method of manufacturing the wiring board according to claim 1, further comprising:

peeling the supporting board from the first insulating layer.

3. The method of manufacturing the wiring board according to claim 2, further comprising:

forming a release layer between the supporting board and the first insulating layer, the release layer facilitating peeling of the supporting board from the first insulating layer.

4. The method of manufacturing the wiring board according to claim 1, further comprising:

curing the first insulating layer and the second insulating layer by heat,

wherein the first insulating layer and the second insulating layer are made of heat-hardening resin material.

5. The method of manufacturing the wiring board according to claim 1, wherein the reinforcing member and the semiconductor chip are mounted on substantially a same plane.

6. The method of manufacturing the wiring board according to claim 1, wherein the reinforcing member is formed so as to surround the semiconductor chip.

7. The method of manufacturing the wiring board according to claim 1, wherein

said at least one reinforcing member includes a plurality of reinforcing members, and

the plurality of reinforcing members is formed on both end portions of the wiring board.

8. The method of manufacturing the wiring board according to claim 1, wherein

said at least one reinforcing member includes a plurality of reinforcing members, and

the plurality of reinforcing members is formed in vicinities of corner portions of the wiring board.

9. The method of manufacturing the wiring board according to claim 1, further comprising:

forming a via hole in the second insulating layer; and

forming a via plug in the via hole.

10. The method of manufacturing the wiring board according to claim 9, wherein the via plug is formed in the via hole in a same step as forming the wiring on the second insulating layer.

11. The method of manufacturing the wiring board according to claim 9, wherein the via hole is formed by using a laser beam, and a bump formed on the semiconductor chip serves as a stopper layer of the laser beam.

12. The method of manufacturing the wiring board according to claim 1, further comprising:

grinding the second insulating layer so as to expose a bump formed on the semiconductor chip,

wherein the wiring is formed on the second insulating layer so as to be connected to the exposed bump.