Voltage regulation using digital voltage control

• US 7,372,382 B2
• Filed: 06/27/2005
• Issued: 05/13/2008
• Est. Priority Date: 06/27/2005
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Schrom, Gerhard, Hazucha, Peter, Karnik, Tanay, De, Vivek, Rajapandian, Saravanan
• Primary Examiner(s): Mai; Lam T.
• Application Number:
  US11/167,978
• Publication Number:
  US 20060290547A1
• Time in Patent Office: 1,051 Days
• Field of Search: 341110-160, 327/540, 323/268, 360/78.04, 360/78
• US Class Current: 341/110
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence

Abstract

For one disclosed embodiment, error is sensed in a voltage at an output node. One or more analog signals are generated based on the sensed error. One or more generated analog signals are converted into one or more digital signals. The voltage at the output node is controlled in response to the one or more digital signals.

Claims

1. A method comprising:

sensing an error in a supply voltage signal supplied at an output node to a varying load;

generating one or more analog signals based on the error;

converting one or more generated analog signals into one or more digital signals representative of a thermometer code; and

controlling the supply voltage signal at the output node in response to the one or more digital signals.

2. The method of claim 1, wherein the controlling comprises generating current at the output node in response to the one or more digital signals.

3. An apparatus comprising:

error sensor circuitry comprising a differential error amplifier to sense an error in a supply voltage signal supplied at an output node to a varying load and to generate one or more analog signals based on the error;

analog-to-digital converter circuitry to convert one or more generated analog signals into one or more digital signals; and

digital voltage controller circuitry to control the supply voltage signal at the output node in response to the one or more digital signals.

4. The apparatus of claim 3, wherein the error sensor circuitry comprises a self-biased error amplifier.

5. An apparatus comprising:

error sensor circuitry comprising a dual output error amplifier to sense an error in a supply voltage signal supplied at an output node to a varying load and to generate one or more analog signals based on the error;

analog-to-digital converter circuitry to convert one or more generated analog signals into one or more digital signals; and

digital voltage controller circuitry to control the supply voltage signal at the output node in response to the one or more digital signals.

6. An apparatus comprising:

error sensor circuitry comprising a dual output error amplifier to sense an error in a supply voltage signal supplied at an output node to a varying load and to generate one or more analog signals based on the error;

analog-to-digital converter circuitry to convert one or more generated analog signals into one or more digital signals, the analog-to-digital converter circuitry comprising a resistive network to generate analog signals in response to one or more analog signals from the error sensor circuitry, and a plurality of buffers to generate digital signals in response to analog signals generated by the resistive network; and

digital voltage controller circuitry to control the supply voltage signal at the output node in response to the one or more digital signals.

7. The apparatus of claim 6, wherein the resistive network comprises a first resistive tree coupled between a first supply node and an input node and a second resistive tree coupled between the input node and a second supply node, wherein the input node is coupled to receive an analog signal from the error sensor circuitry.

8. The apparatus of claim 6, wherein the resistive network has resistor ladders.

9. The apparatus of claim 6, wherein the resistive network comprises R-2R ladders coupled in parallel between a first supply node and an input node and R-2R ladders coupled in parallel between the input node and a second supply node, wherein the input node is coupled to receive an analog signal from the error sensor circuitry.

10. The apparatus of claim 6, wherein the resistive network comprises a resistive tree coupled between two input nodes coupled to receive analog signals from the error sensor circuitry.

11. An apparatus comprising:

error sensor circuitry comprising a dual output error amplifier to sense an error in a supply voltage signal supplied at an output node to a varying load and to generate one or more analog signals based on the error;

analog-to-digital converter circuitry to convert one or more generated analog signals into one or more digital signals; and

digital voltage controller circuitry to control the supply voltage signal at the output node in response to the one or more digital signals, wherein the digital voltage controller circuitry comprises a plurality of transistors to couple the output node to one or more supply nodes in response to digital signals from the analog-to-digital converter circuitry.

12. A voltage regulator comprising:

an error amplifier coupled to receive a voltage signal corresponding to an output voltage signal, the error amplifier being a differential error amplifier, a self-biased error amplifier, or a dual output error amplifier;

a flash analog-to-digital converter coupled to receive one or more analog signals from the error amplifier to generate thermometer code digital signals; and

a digital-to-analog converter coupled to receive thermometer code digital signals from the flash analog-to-digital converter to generate the output voltage signal.

13. The voltage regulator of claim 12, comprising a filter coupled to receive one or more analog signals from the error amplifier, wherein the flash analog-to-digital converter is coupled to receive one or more analog signals from the filter.