Chip-to-chip optical interconnect

• US 7,373,033 B2
• Filed: 06/13/2006
• Issued: 05/13/2008
• Est. Priority Date: 06/13/2006
• Status: Expired due to Fees

• Current Assignee: Intel Limited (Intel Corporation)
• Original Assignee: Intel Corporation
• Inventors: Lu, Daoqiang, He, Jiangqi, Zarbock, Edward A., Tang, Jiamiao
• Primary Examiner(s): Sanghavi; Hemang
• Application Number:
  US11/452,820
• Publication Number:
  US 20070297713A1
• Time in Patent Office: 700 Days
• Field of Search: 385/14, 385 49- 51, 385 88- 94, 257/432, 257/779
• US Class Current: 385/14
• CPC Class Codes: G02B 6/421 the intermediate optical component consisting of a short length of fibre, e.g. fibre stub
• CPC Class Codes: G02B 6/4214 the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device G02B6/4246 takes precedence
• CPC Class Codes: G02B 6/4232 using the surface tension of fluid solder to align the elements, e.g. solder bump techniques flip-chip mounting techniques in assembly of semiconductor devices H01L24/81
• CPC Class Codes: G02B 6/4246 Bidirectionally operating package structures

Abstract

A chip-to-chip optical interconnect includes a substrate, an optoelectronic die, and a waveguide structure. The substrate includes an optical via passing through the substrate. The optoelectronic die is disposed on the substrate and aligned to optically communicate through the optical via. A waveguide structure is positioned proximate to the substrate and aligned with the optical via to communicate optical signals with the optoelectronic die through the optical via.

Claims

1. An apparatus, comprising:

a substrate including an optical via passing through the substrate;

an optoelectronic die disposed on the substrate, the optoelectronic die aligned to optically communicate through the optical via;

a waveguide structure positioned proximate to the substrate and aligned with the optical via to communicate optical signals with the optoelectronic die through the optical via; and

a socket including a first electrical terminal array and a waveguide mounting region,

wherein the substrate includes a second electrical terminal array configured to electrically interconnect with the first electrical terminal array when the substrate is mated with the socket, and

wherein the waveguide structure mounts to the waveguide mounting region of the socket.

2. The apparatus of claim 1, further comprising:

a mechanical support to support the waveguide structure,

wherein the waveguide mounting region of the socket comprises a recess in the socket to accept the mechanical support, and

wherein the mechanical support is mounted into the recess.

3. The apparatus of claim 1, further comprising:

at least one alignment hole disposed in at least one of the mechanical support or the waveguide structure; and

at least one alignment pin disposed on the substrate, wherein the at least one alignment pin mates with the alignment holes to optically align the waveguide structure with the optical via when the substrate is mated with the socket.

4. The apparatus of claim 1, further comprising:

at least one alignment hole disposed in the substrate; and

at least one alignment pin disposed on at least one of the waveguide structure or the mechanical support, wherein the alignment pin mate with the alignment hole to optically align the waveguide structure with the optical via when the substrate is mated with the socket.

5. The apparatus of claim 1, wherein the waveguide structure comprises a plurality of waveguides, the apparatus further comprising:

a plurality of optical vias passing through the substrate, wherein each one of the plurality of waveguides is optically aligned with one of the plurality of optical vias.

6. The apparatus of claim 1, further comprising an integrated circuit disposed on the substrate and electrically connected to the optoelectronic die and electrically connected to the second electrical terminal array.

7. The apparatus of claim 6, wherein the integrated circuit is electrically connected to the optoelectronic die along conductor traces disposed on a surface of the substrate, and wherein the integrated circuit is electrically connected to the second electrical terminal array by a plurality of electrical vias passing through the substrate.

8. The apparatus of claim 6, wherein the integrated circuit comprises a first integrated circuit, the apparatus further comprising:

a circuit board, wherein the socket is disposed on the circuit board; and

a second integrated circuit disposed on the circuit board, wherein first and second integrated circuits are electrically interconnected through the socket.

9. The apparatus of claim 8, wherein the socket comprises a first socket, the substrate comprises a first substrate, the optoelectronic die comprises a first optoelectronic die, and the optical via comprises a first optical via, wherein the apparatus further comprises:

a second socket disposed on the circuit board;

a second substrate including a second optical via passing through the second substrate, the second substrate mated to the second socket, wherein the waveguide structure is mounted at a first end to the first socket and at a second end to the second socket; and

a second optoelectronic die disposed on the second substrate and optically aligned with the waveguide structure through the second optical via, wherein the first and second optoelectronic dice are coupled to optically communicate through the waveguide structure.

10. The apparatus of claim 1, further comprising a lens disposed to focus the optical signals communicated through the optical via.

11. The apparatus of claim 1, wherein the waveguide structure includes a mirror angled to reflect the optical signals received from the optical via into the waveguide structure or to reflect the optical signals received from the waveguide structure into the optical via.

12. A method, comprising:

receiving an optical signal from a waveguide at a first side of a substrate disposed proximate to the waveguide;

passing the optical signal from the first side of the substrate through an optical via to a second side of the substrate;

coupling the optical signal into an optoelectronic die disposed on the second side of the substrate and aligned with the optical via;

converting the optical signal to an electrical signal within the optoelectronic die;

coupling the electrical signal to an integrated circuit disposed on the second side of the substrate; and

coupling a second electrical signal into at least one electrical terminal of an array of electrical terminals within a socket on which the substrate is mounted.

13. The method of claim 12, further comprising:

coupling the second electrical signal through at least one electrical via passing from the first side of the substrate to the second side of the substrate; and

coupling the second electrical signal from the at least one electrical via into the integrated circuit.

14. The method of claim 13, further comprising:

propagating the optical signal along the waveguide;

reflecting the optical signal from a first end of the waveguide into the optical via; and

focusing the optical signal after reflecting the optical signal and prior to coupling the optical signal into the optoelectronic die.

15. The method of claim 14, further comprising mechanically supporting the first end of the waveguide within a recess on the socket, wherein the substrate overlays a portion of the waveguide when mated with the socket.

16. A system, comprising:

a socket;

a substrate mated to the socket on a first side and including an optical via passing through the substrate;

an optoelectronic die disposed on a second side of the substrate, the optoelectronic die aligned to optically communicate through the optical via;

a waveguide structure positioned proximate to the substrate and aligned with the optical via on the first side of the substrate to communicate optical signals with the optoelectronic die through the optical via;

an integrated circuit disposed on the second side of the substrate; and

synchronous dynamic random access memory (“

SDRAM”

) electrically coupled to the integrated circuit via the socket.

17. The system of claim 16, wherein the socket includes a first electrical terminal array and a waveguide mounting region, wherein the substrate includes a second electrical terminal array configured to electrically interconnect with the first electrical terminal array when the substrate in mated with the socket, and wherein the waveguide structure mounts to the waveguide mounting region of the socket.

18. The system of claim 17, further comprising:

a mechanical support to support the waveguide structure,

wherein the waveguide mounting region of the socket comprises a recess in the socket to accept the mechanical support, and

wherein the mechanical support is mounted into the recess.

19. The system of claim 18, further comprising:

a first alignment structure disposed on at least one of the mechanical support or the waveguide structure; and

a second alignment structure disposed on the first side of the substrate, wherein the first and second alignment structures mate to optically align the waveguide structure with the optical via when the substrate is mated with the socket.