System and method for interleaving point-of-load regulators

• US 7,373,527 B2
• Filed: 12/23/2002
• Issued: 05/13/2008
• Est. Priority Date: 12/23/2002
• Status: Active Grant

• Current Assignee: Bel Power Solutions Inc.
• Original Assignee: Power-One Incorporated (ABB Limited)
• Inventors: Chapuis, Alain
• Primary Examiner(s): SURYAWANSHI, SURESH
• Application Number:
  US10/328,154
• Publication Number:
  US 20040123167A1
• Time in Patent Office: 1,968 Days
• Field of Search: 713/300, 323/282, 323/284, 307/29, 365/226
• US Class Current: 713/300
• CPC Class Codes: H02J 1/102 being switching converters H02J1/108, H02J1/12 take precedence
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: H02M 3/285 Single converters with a plurality of output stages connected in parallel parallel operation of a plurality of converters in dc distribution networks H02J1/10

Abstract

A system and method for providing interleaving point-of-load (POL) regulators such that each regulator'"'"'s switching cycle is phase displaced with respect to those of other POL regulators in the array is disclosed. As a result, the aggregate input and/or output reflected ripple and noise of the input, output, or both is reduced. Each regulator in the array is associated with an unique address. A serial data-line writes the phase spacing programmed to each addressable POL regulator in the array. The present invention permits phase displacement of POL regulators without limitation to the input and output voltages of each of the regulators in the array. The array of POL regulators may also operate in a phase displaced mode with only a single control line. The need for separate controllers and multiple control lines is thereby eliminated.

Claims

1. A power supply system comprising:

a plurality of voltage regulators, wherein each voltage regulator is operable to provide a voltage output and is associated with an address;

a master clock generator operable to generate a synchronization signal;

an interface line operable to communicatively couple the voltage regulators in parallel and carry the synchronization signal to allow the voltage regulators to receive the synchronization signal; and

a plurality of clock recovery circuits, wherein each clock recovery circuit is associated with a voltage regulator and wherein each clock recovery circuit is operable to generate a phase shifted trigger signal, wherein the phase shifted trigger signal is phase shifted with respect to the synchronization signal by a selected phase difference and synchronized to a selected frequency multiple of the synchronization signal based on the address of the associated voltage regulator such that a first switching cycle associated with a first voltage regulator may be phase displaced with respect to a second switching cycle associated with a second voltage regulator and a different frequency from the second switching cycle.

2. The supply system of claim 1, wherein a selected one of the plurality of voltage regulators further comprises the master clock generator.

3. The supply system of claim 1, wherein a selected one of the plurality of clock recovery circuits further comprises the master clock generator.

4. The power supply system of claim 1, further comprising a controller communicatively coupled to the interface line and operable to transmit data to the voltage regulators and set the selected phase difference for each voltage regulator via the interface line.

5. The power supply system of claim 4 wherein the controller is operable to set the selected phase difference to minimize system noise.

6. The power supply system of claim 5, wherein the controller is operable to dynamically set the selected phase difference to minimize system noise in response to a change in a selected system parameter.

7. The power supply system of claim 6, wherein the selected system parameter is the number of enabled voltage regulators.

8. The power supply system of claim 1, wherein the phase displacement and selected frequency multiple of each voltage regulator is selected based on the input voltage of the respective voltage regulator.

9. The power supply system of claim 1, wherein the phase displacement and selected frequency multiple of each voltage regulator is selected based on the output voltage of the respective voltage regulator.

16. The power supply system of claim 1, wherein the voltage regulator is a point-of-load (POL) regulator.

17. The power supply system of claim 1, wherein the power supply system is operable to receive multiple independent voltage inputs.

18. The power supply system of claim 1, wherein the power supply system further comprises a single multiple-phase voltage output.

19. The power supply system of claim 1, wherein the voltage outputs of at least two voltage regulators are connected in parallel.

20. The power supply system of claim 19, wherein the power supply system further comprises a current share line communicatively coupled between at least two voltage regulators that are connected in parallel to thereby provide an equal load share between the voltage regulators that are connected in parallel.

10. A power supply system comprising:

a plurality of voltage regulators, wherein each voltage regulator is operable to provide a voltage output and is associated with an address;

a master clock generator operable to generate a synchronization signal;

an interface line operable to communicatively couple the voltage regulators in parallel and carry the synchronization signal to allow the voltage regulators to receive the synchronization signal; and

a plurality of clock recovery circuits, wherein each clock recovery circuit is associated with a voltage regulator and wherein each clock recovery circuit is operable to generate a phase shifted trigger signal, wherein the phase shifted trigger signal is phase shifted with respect to the synchronization signal by a selected phase difference and synchronized to a selected frequency multiple of the synchronization signal based on the address of the associated voltage regulator such that a first switching cycle associated with a first voltage regulator may be phase displaced with respect to a second switching cycle associated with a second voltage regulator and a different frequency from the second switching cycle;

wherein each voltage regulator further comprises;

an input terminal, an output terminal and a return terminal, wherein the voltage regulator is operable to convert an input voltage between the input terminal and the return terminal into an output voltage between the return terminal and the output terminal;

a power device;

a memory operable to store the selected phase displacement; and

an output voltage controller operable to receive the phase shifted trigger signal and transmit a pulse width modulated signal based on the phase shifted trigger signal to control the operation of the power device, wherein an associated one of the plurality of clock recovery circuits is operable to access the memory, receive the synchronization signal and transmit the phase shifted trigger signal to the pulse width modulator based on the selected phase displacement.

11. The power supply system of claim 10, wherein the voltage regulator further comprises a serial interface handler operable to decode data transmitted via the interface line and store the selected phase displacement in the memory.

12. The power supply system of claim 10, wherein the output voltage controller further comprises a pulse width modulator operable to generate the pulse width modulated signal.

13. The power supply system of claim 10, wherein the clock recovery circuit comprises a ring oscillator operable to generate a delay bus associated with a plurality of delay bus signals, wherein the phase shifted trigger signal is based on the selected delay bus signal.

14. The power supply system of claim 13, wherein the clock recovery circuit further comprises a multiplexer operable to select the delay bus signal based on the selected phase displacement stored in the memory.

15. The power supply system of claim 14, wherein the memory is initialized with the address of the voltage regulator.

21. A voltage regulation module comprising:

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data; and

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module.

22. The voltage regulation module of claim 21, wherein said clock recovery circuit further comprises a master clock generator adapted to provide a synchronization signal to said at least one other voltage regulation module through said serial data interface.

23. The voltage regulation module of claim 21, wherein said clock recovery circuit further comprises a clock generator adapted to provide in conjunction with a corresponding clock generator of said at least one other voltage regulation module a common synchronization signal on said serial data interface.

24. The voltage regulation module of claim 22, wherein the phase shifted trigger signal is phase shifted with respect to said synchronization signal by a selected phase difference and synchronized to a selected frequency multiple of said synchronization signal.

25. The voltage regulation module of claim 21, wherein said serial data further comprises an address identifying said voltage regulation module.

26. The voltage regulation module of claim 25, wherein said clock recovery circuit determines phase displacement data from said address.

27. The voltage regulation module of claim 21, wherein said serial data further comprises phase displacement data for said voltage regulator.

29. The voltage regulation module of claim 21, further comprising a current share interface adapted to communicate with a corresponding current share interface of said at least one other voltage regulation module.

28. A voltage regulation module comprising:

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data;

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module, wherein said serial data further comprises phase displacement data for said voltage regulation module; and

a memory operatively coupled to said serial data interface and said clock recovery circuit, said memory storing said phase displacement data.

30. A voltage regulation module comprising:

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data; and

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module;

wherein said clock recovery circuit comprises a ring oscillator operable to generate a plurality of delay bus signals, wherein said phase shifted trigger signal is based on a selected one of said plurality of delay bus signals.

31. The voltage regulation module of claim 30, wherein said clock recovery circuit further comprises a multiplexer operable to select one of said plurality of delay bus signals.

32. A voltage regulation module comprising:

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data;

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module; and

a memory storing an address of the voltage regulation module.

33. A power supply system comprising:

a plurality of voltage regulation modules, with each module including;

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data; and

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module; and

a serial data bus coupled to each said serial data interface of said plurality of voltage regulation modules.

34. The power supply system of claim 33, wherein each said clock recovery circuit further comprises a master clock generator adapted to provide a synchronization signal onto said serial data bus to other ones of said plurality of voltage regulation modules.

35. The power supply system of claim 33, wherein each said clock recovery circuit further comprises a clock generator adapted to provide in conjunction with a corresponding clock generator of other ones of said plurality of voltage regulation modules a common synchronization signal on said serial data bus.

36. The power supply system of claim 34, wherein the phase shifted trigger signal is phase shifted with respect to said synchronization signal by a selected phase difference and synchronized to a selected frequency multiple of said synchronization signal.

37. The power supply system of claim 33, further comprising a master clock generator operable to generate a synchronization signal provided to said plurality of voltage regulation modules via said serial data bus.

38. The power supply system of claim 33, wherein a selected one of said plurality of voltage regulation modules further comprises a master clock generator operable to generate a synchronization signal provided to other ones of said plurality of voltage regulation modules via said serial data bus.

39. The power supply system of claim 33, wherein said serial data further comprises addresses associated with each respective one of said plurality of voltage regulation modules.

40. The power supply system of claim 39, wherein each said clock recovery circuit determines phase displacement data from a corresponding one of said addresses.

41. The power supply system of claim 33, wherein said serial data further comprises phase displacement data for a corresponding one of said plurality of voltage regulation modules.

42. The power supply system of claim 41, wherein each one of said plurality of voltage regulation modules further comprises a memory operatively coupled to said serial data interface and said clock recovery circuit, said memory storing said phase displacement data.

43. The power supply system of claim 33, wherein each one of said plurality of voltage regulation modules further comprises a current share interface adapted to communicate with a corresponding current share interface of another one of said plurality of voltage regulation modules.

47. The power supply system of claim 33, further comprising a controller communicatively coupled to said serial data bus and operable to transmit said serial data to said plurality of voltage regulation modules to set a respective phase displacement for each one of said plurality of voltage regulation modules.

48. The power supply system of claim 47, wherein said controller is operable to set the respective phase displacement to minimize system noise.

49. The power supply system of claim 48, wherein said controller is operable to dynamically set the respective phase displacement to minimize system noise in response to a change in a selected system parameter.

50. The power supply system of claim 49, wherein said selected system parameter comprises a number of enabled ones of said plurally of voltage regulation modules.

44. A power supply system comprising:

a plurality of voltage regulation modules, with each module including;

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data; and

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module; and

a serial data bus coupled to each said serial data interface of said plurality of voltage regulation modules;

wherein each said clock recovery circuit comprises a ring oscillator operable to generate a plurality of delay bus signals, wherein said phase shifted trigger signal is based on a selected one of said plurality of delay bus signals.

45. The power supply system of claim 44, wherein each said clock recovery circuit further comprises a multiplexer operable to select one of said plurality of delay bus signals.

46. A power supply system comprising:

a plurality of voltage regulation modules, with each module including;

an input terminal adapted to receive an input voltage, at least one power switching device operatively coupled between said input terminal and an output filter, said at least one power switching device successively applying said input voltage to said output filter, and an output terminal coupled to said output filter to provide an output voltage therefrom;

a pulse width modulator operatively coupled to said at least one power switching device to regulate a switching pulse width of said at least one power switching device responsive to said output voltage;

a serial data interface adapted to receive serial data;

a clock recovery circuit coupled to said serial data interface and providing a phase shifted trigger signal to said pulse width modulator in response to said serial data, said phase shifted trigger signal thereby phase displacing a switching cycle of said at least one power switching device with respect to a corresponding switching cycle associated with at least one other voltage regulation module; and

a memory storing an address of the respective voltage regulation module; and

a serial data bus coupled to each said serial data interface of said plurality of voltage regulation modules.