Speculative multiaddress atomicity
First Claim
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1. A method of performing a plurality of operations in a shared memory system having a plurality of addresses comprising:
- entering into a speculative mode;
speculatively performing each of the plurality of operations on addresses in the shared memory system such that the plurality of operations appears atomic to one or more execution threads;
marking addresses in the shared memory system that have been operated on speculatively as being in a speculative state; and
exiting the speculative mode, wherein exiting the speculative mode includes marking the addresses in the shared memory system that have been operated on as being in a non-speculative state.
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Abstract
A technique for performing a plurality of operations in a shared memory system having a plurality of addresses is disclosed. The technique includes entering into a speculative mode, speculatively performing each of the plurality of operations on addresses in the shared memory system, marking addresses in the shared memory system that have been operated on speculatively as being in a speculative state, and exiting the speculative mode, wherein exiting the speculative mode includes marking the addresses in the shared memory system that have been operated on as being in a non-speculative state.
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Citations
28 Claims
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1. A method of performing a plurality of operations in a shared memory system having a plurality of addresses comprising:
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entering into a speculative mode; speculatively performing each of the plurality of operations on addresses in the shared memory system such that the plurality of operations appears atomic to one or more execution threads; marking addresses in the shared memory system that have been operated on speculatively as being in a speculative state; and exiting the speculative mode, wherein exiting the speculative mode includes marking the addresses in the shared memory system that have been operated on as being in a non-speculative state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A system for performing a plurality of operations in a shared memory system having a plurality of addresses comprising:
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a processor configured to; enter into a speculative mode; speculatively perform each of the plurality of operations on addresses in the shared memory system such that the plurality of operations appears atomic to one or more execution threads; mark addresses in the shared memory system that have been operated on speculatively as being in a speculative state; and exit the speculative mode, wherein exiting the speculative mode includes marking the addresses in the shared memory system that have been operated on as being in a non-speculative state; and a memory coupled with the processor, wherein the memory provides the processor with instructions.
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28. A computer program product for performing a plurality of operations in a shared memory system having a plurality of addresses, the computer program product being stored in a computer readable medium and comprising computer instructions for:
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entering into a speculative mode; speculatively performing each of the plurality of operations on addresses in the shared memory system such that the plurality of operations appears atomic to one or more execution threads; marking addresses in the shared memory system that have been operated on speculatively as being in a speculative state; and exiting the speculative mode, wherein exiting the speculative mode includes marking the addresses in the shared memory system that have been operated on as being in a non-speculative state.
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Specification