Wiring board manufacturing method

• US 7,377,030 B2
• Filed: 11/04/2005
• Issued: 05/27/2008
• Est. Priority Date: 05/23/2003
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Ilda, Kenji, Seyama, Kiyotaka, Arai, Keiji, Abe, Kenichiro, Takano, Kenji, Shuto, Takashi
• Primary Examiner(s): Arbes; Carl J.
• Application Number:
  US11/266,480
• Publication Number:
  US 20060112544A1
• Time in Patent Office: 935 Days
• Field of Search: 298/25, 298/30, 298/32, 298/33, 298/46
• US Class Current: 29/830
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19106 in a mirrored arrangement on two different side of a common die mounting substrate
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/0271 Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 1/183 Components mounted in and supported by recessed areas of the printed circuit board
• CPC Class Codes: H05K 2201/0347 : Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias reinforcing the conductive pattern H05K3/24
• CPC Class Codes: H05K 2201/0355 : Metal foils
• CPC Class Codes: H05K 2201/0391 : Using different types of conductors
• CPC Class Codes: H05K 2201/068 : wherein the coefficient of thermal expansion is important
• CPC Class Codes: H05K 2201/0959 : Plated through-holes or plated blind vias filled with insulating material
• CPC Class Codes: H05K 2201/096 : Vertically aligned vias, holes or stacked vias
• CPC Class Codes: H05K 2201/09781 : Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2201/10378 : Interposers
• CPC Class Codes: H05K 2201/10545 : Related components mounted on both sides of the PCB
• CPC Class Codes: H05K 2201/10674 : Flip chip
• CPC Class Codes: H05K 2203/0156 : Temporary polymeric carrier or foil, e.g. for processing or transferring
• CPC Class Codes: H05K 2203/016 : Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
• CPC Class Codes: H05K 2203/061 : of previously made multilayered subassemblies laminating only or mainly similar single-sided circuit boards H05K3/4617; laminating only or mainly similar double-sided circuit boards H05K3/462
• CPC Class Codes: H05K 2203/085 : Using vacuum or low pressure
• CPC Class Codes: H05K 2203/1536 : Temporarily stacked PCBs
• CPC Class Codes: H05K 3/20 : by affixing prefabricated conductor pattern H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence
• CPC Class Codes: H05K 3/4069 : for via connections in organic insulating substrates
• CPC Class Codes: H05K 3/4602 : characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
• CPC Class Codes: H05K 3/4614 : the electrical connections between the circuit boards being made during lamination
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4652 : Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern H05K3/4647 takes precedence
• CPC Class Codes: H05K 3/4682 : Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
• CPC Class Codes: H05K 3/4697 : having cavities, e.g. for mounting components H05K3/4691 takes precedence
• CPC Class Codes: Y10T 29/49117 : Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 : with selective destruction of conductive paths
• CPC Class Codes: Y10T 29/49169 : Assembling electrical component directly to terminal or elongated conductor

Abstract

The present invention relates to a method of manufacturing a wiring board comprising: a build-up layer, in which wiring patterns are piled with insulating layers; and a core substrate, which is separately formed from the build-up layer, the method comprising the steps of: separably forming the build-up layer on a plate-shaped support; electrically connecting the core substrate to the wiring patterns of the build-up layer on the support; and removing the support from the build-up layer so as to form the wiring board, in which the build-up layer is connected to the core substrate. By separably forming the build-up layer and the core substrate, the wiring board effectively exhibiting characteristics thereof can be produced.

Claims

1. A method of manufacturing a wiring board comprising:

a build-up layer, in which wiring patterns are piled with insulating layers; and

a core substrate, which is separately formed from the build-up layer, said method comprising the steps of;

separably forming the build-up layer on a plate-shaped support;

electrically connecting the core substrate to the wiring patterns of the build-up layer on the support; and

removing the support from the build-up layer so as to form the wiring board, in which the build-up layer is connected to the core substrate.

2. The method according to claim 1, wherein a metal layer is vacuum-sucked on the support, the build-up layer is formed on the metal layer, and the vacuum state between the metal layer and the support is broken after the core substrate is connected to the build-up layer so as to separate the said wiring board constituted by the build-up layer and the core substrate from the support together with the metal layer.

3. The method according to claim 1, wherein a first metal layer is adhered on the support, a second metal layer is vacuum-sucked on the support,

the build-up layer is formed on the second metal layer, and

the vacuum state between the first metal layer and the second metal layer is broken after the core substrate is connected to the build-up layer so as to separate said wiring board constituted by the build-up layer and the core substrate from the first metal layer together with the second metal layer.

4. The method according to claim 3, wherein the second metal layer is broader than the first metal layer, the second metal layer is vacuum-sucked on the support, an outer edge of the second metal layer is adhered to the support,

the build-up layer is formed on the second metal layer,

the core substrate is connected to the build-up layer so as to form a layered body, and

the layered body is cut inside of the outer edge of the first metal layer, the vacuum state between the first metal layer and the second metal layer is broken so as to separate said wiring board constituted by the build-up layer and the core substrate from the first metal layer together with the second metal layer.

5. The method according to claim 1, wherein the core substrate is adhered to the build-up layer formed on the support by an adhesive film, which is an electric insulating film and has through-holes filled with an electric conductive material,

whereby the core substrate and the build-up layer are electrically connected.

6. The method according to claim 1, wherein an element hole, in which a circuit element will be mounted, is formed in one side face of the core substrate, which is located on the opposite side of a semiconductor chip mounting position of the build-up layer.