Versatile wafer refining

• US 7,377,836 B1
• Filed: 04/12/2004
• Issued: 05/27/2008
• Est. Priority Date: 10/10/2000
• Status: Expired due to Fees

• Current Assignee: Semcon Tech LLC (IPNav)
• Original Assignee: Beaver Creek Concepts, Inc.
• Inventors: Molnar, Charles J.
• Primary Examiner(s): Wilkins, III, Harry D.
• Assistant Examiner(s): Smith, Nicholas A
• Application Number:
  US10/822,515
• Time in Patent Office: 1,506 Days
• Field of Search: 451/5, 451 8- 11, 451/36, 451/41, 216/38, 216/88, 216/89, 216/91, 438690-693, 205640-641, 205645-646, 205/662, 702/179, 702/182, 700/164
• US Class Current: 451/5
• CPC Class Codes: B24B 37/013 Devices or means for detecting lapping completion
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Methods of refining using a plurality of refining elements are discussed. A refining apparatus having refining elements that can be smaller than the workpiece being refined are disclosed. New refining methods, refining apparatus, and refining elements disclosed. Methods of refining using frictional refining, chemical refining, tribochemical refining, and electrochemical refining and combinations thereof are disclosed. A refining apparatus having magnetically responsive refining elements that can be smaller than the workpiece being refined are disclosed. The refining apparatus can supply a parallel refining motion to the refining element(s) for example through magnetic coupling forces. The refining apparatus can supply multiple different parallel refining motions to multiple different refining elements for example solely through magnetic coupling forces to improve refining quality and versatility. A refining chamber can be used. New methods of control are refining disclosed. The new refining methods, including magnetic refining methods, apparatus, and refining elements, including magnetically responsive refining elements, can help improve yield and lower the cost of manufacture for refining of workpieces having extremely close tolerances such as semiconductor wafers. New methods of control are also discussed. Methods and apparatus which use processor readable memory devices are discussed. Refining fluids are preferred. Reactive refining aids are preferred. Electro-refining for adding and removing material is disclosed. New methods and new apparatus for non-steady state refining control are disclosed.

Claims

1. A method of refining a first and a second layer of a semiconductor wafer, each having an effect on a cost of manufacture, the method comprising:

applying a first refining energy to the first layer of the semiconductor wafer for a first layer refining;

sensing a real time process information for the first layer of the semiconductor wafer during the first layer refining with an at least one operative sensor for the first layer refining;

determining an improvement in real time for an at least one first layer control parameter “

A”

using a tracking code of the semiconductor wafer and the real time process information for the first layer of the semiconductor wafer with an operative control subsystem for the first layer refining;

controlling in real time the at least one first layer process control parameter “

A”

to change a first semiconductor wafer surface during the first layer refining of the first layer of the semiconductor wafer;

storing for future availability a stored information related to the at least one first layer process control parameter “

A”

, the tracking code of the semiconductor wafer, and the real time process information for the first layer of the semiconductor wafer;

applying a second refining energy to the second layer of the semiconductor wafer having an at least one second layer control parameter “

B”

for a second layer refining;

sensing a real time process information for the second layer of the semiconductor wafer during the second layer refining with an at least one operative sensor for the second layer refining;

determining an improvement in real time for the at least one second layer control parameter “

B”

using at least a portion of the stored information related to the tracking code of the semiconductor wafer, the real time process information for the first layer of the semiconductor wafer, and the real time process information for the second layer of the semiconductor wafer with an operative control subsystem for the second layer refining; and

controlling in real time the at least one second layer process control parameter “

B”

to change a second semiconductor wafer surface during the second layer refining of the second layer of the semiconductor wafer; and

using an at least one process model and using a predictive control during the method.

2. The method according to claim 1 wherein controlling in real time the at least one first layer process control parameter “

A”

comprises controlling in real time the at least one first layer process control parameter “

A”

to change a removal of a material from the first semiconductor wafer surface during the refining of the first layer of the semiconductor wafer.

3. The method according to claim 1 wherein applying the first refining energy comprises applying at least two independent refining energies.

4. The method according to claim 1 wherein applying the first refining energy comprises applying at least two different refining energies.

5. The method according to claim 1 wherein applying the first refining energy comprises applying at least two different, independent refining energies.

6. The method according to claim 1 wherein applying the first refining energy comprises applying at least one electrochemical energy for removing a material from the first semiconductor wafer surface.

7. The method according to claim 1 wherein applying the second refining energy comprises applying at least two independent refining energies.

8. The method according to claim 1 wherein applying the second refining energy comprises applying at least two different refining energies.

9. The method according to claim 1 wherein applying the second refining energy comprises applying at least two different, independent refining energies.

10. The method according to claim 1 wherein applying the second refining energy comprises applying at least one electrochemical energy for removing a material from the second semiconductor wafer surface.

11. The method according to claim 1 wherein applying the second refining energy comprises applying at least one electrochemical energy for adding a material to the second semiconductor wafer surface.

12. The method according to claim 1 wherein:

controlling in real time the at least one first layer process control parameter “

A”

comprises controlling in real time the at least one first layer process control parameter “

A”

to change a removal of a material from the first semiconductor wafer surface during the first layer refining of the semiconductor wafer; and

controlling in real time the at least one second layer process control parameter “

B”

comprises controlling in real time the at least one second layer process control parameter “

B”

to change a removal of the material from the second semiconductor wafer surface during the refining of the second layer of the semiconductor wafer.

13. The method according to claim 1 wherein:

applying the first refining energy comprises applying at least two independent refining energies; and

applying the second refining energy comprises applying at least two independent refining energies.

14. The method according to claim 1 wherein:

applying the first refining energy comprises applying at least two different refining energies; and

applying the second refining energy comprises applying at least two different refining energies.

15. The method according to claim 1 wherein:

applying the first refining energy comprises applying at least two different, independent refining energies; and

applying the second refining energy comprises applying at least two different, independent refining energies.

16. The method according to claim 1 wherein:

applying the first refining energy comprises applying at least one electrochemical energy for removing a material from the first semiconductor wafer surface; and

applying the second refining energy comprises applying at least one electrochemical energy for removing the material from the second semiconductor wafer surface.

17. The method according to claim 1 wherein:

applying the first refining energy comprises applying at least one electrochemical energy for adding a material to the first semiconductor wafer surface; and

applying the second refining energy comprises applying at least one electrochemical energy for adding the material to the second semiconductor wafer surface.

18. The method according to claim 1 wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method.

19. The method according to claim 18 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 18.

20. The method according to claim 1 wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method;

and wherein the semiconductor wafer comprises a semiconductor wafer having a diameter of at least 300 millimeter; and

additionally comprising;

using a refining element having a refining element identification code during the method.

21. The method according to claim 20 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 20.

22. The method according to claim 5 wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

23. The method according to claim 22 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 22.

24. The method according to claim 6 wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method;

and

wherein the semiconductor wafer comprises a semiconductor wafer having a diameter of at least 300 millimeters.

25. The method according to claim 15 wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

26. The method according to claim 25 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 25.

27. The method according to claim 15 wherein using an at least one process model comprises using at least in part a first principles process model;

and

additionally comprising;

using a refining element having a refining element identification code during the method.

28. The method according to claim 27 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 27.

29. The method according to claim 16 wherein using an at least one process model comprises using at least in part a first principles process model;

and

wherein the semiconductor wafer comprises a semiconductor wafer having a diameter of at least 300 millimeters.

30. The method according to claim 29 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 29.

31. The method according to claim 17 wherein using an at least one process model comprises using at least in part a first principles process model;

and

wherein the semiconductor wafer comprises a semiconductor wafer having a diameter of at least 300 millimeters.

32. The method according to claim 31 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 31.

33. The method according to claim 1 wherein at least one of applying a first refining energy or applying a second refining energy comprises applying an at least one electrochemical energy for adding a material and wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

34. The method according to claim 1 wherein at least one of applying a first refining energy or applying a second refining energy comprises applying an at least one electrochemical energy for removing a material and wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

35. The method according to claim 34 wherein applying a first refining energy comprises applying at least two different independent refining energies or wherein applying a second refining energy comprises applying at least two different independent refining energies.

36. The method according to claim 35 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 35.

37. The method according to claim 1 wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method and wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and

additionally comprising;

using a refining element having a refining element identification code during the method.

38. The method according to claim 37 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 37.

39. The method according to claim 1 wherein at least one of applying a first refining energy and applying a second refining energy comprise applying at least one electrochemical energy for adding a material and applying at least one electrochemical energy for removing the material and wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

40. The method according to claim 39 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 39.

41. The method according to claim 39 additionally comprising:

supplying a group of an at least three apparatus wherein each member of the group of the at least three apparatus has at least two refining elements and an at least two different refining element identification codes, the refining element identification codes forming a family of an at least six refining element identification codes, each refining element identification code being different from each other and wherein each of the at least three apparatus includes at least two electrodes;

using an at least one processor having access to the family of the at least six refining element identification codes for the at least three apparatus; and

using a manufactured article having a processor readable medium with processor readable instructions which use the family of the at least six refining element identification codes to determine a change for an at least one control parameter during a refining cycle time.

42. The method according to claim 1 wherein applying a first refining energy comprises applying at least two different independent electrochemical refining energies and wherein applying a second refining energy comprises applying at least two different independent electrochemical refining energies and wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0 and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

43. The method according to claim 42 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 42.

44. The method according to claim 42 additionally comprising:

supplying a group of an at least three apparatus wherein each member of the group of the at least three apparatus has at least two refining elements and an at least two different refining element identification codes, the refining element identification codes forming a family of an at least six refining element identification codes, each refining element identification code being different from each other and wherein each of the at least three apparatus includes at least two electrodes;

using an at least one processor having access to the family of the at least six refining element identification codes for the at least three apparatus; and

using a manufactured article having a processor readable medium with processor readable instructions which use the family of the at least six refining element identification codes to determine a change for an at least one control parameter during a refining cycle time.

45. The method according to claim 1 wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

46. The method according to claim 45 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 45.

47. The method according to claim 45 additionally comprising:

data mining the stored information.

48. The method according to claim 1 wherein the semiconductor wafer comprises a semiconductor wafer having a low-k layer having a k value of at most 3.0;

and wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method; and

additionally comprising;

using a refining element having a refining element identification code during the method.

49. The method according to claim 48 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 48.

50. The method according to claim 48 additionally comprising:

data mining the stored information.

51. The method according to claim 1 wherein the semiconductor wafer has a diameter of at least 300 millimeters and wherein the semiconductor wafer has a low-k layer having a k value of at most 3.0;

and additionally comprising;

changing the cost of manufacture by an appreciable amount.

52. The method according to claim 51 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 51.

53. The method according to claim 1 wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method;

and additionally comprising;

changing the cost of manufacture by an appreciable amount.

54. The method according to claim 53 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 53.

55. The method according to claim 1 wherein using an at least one process model comprises using at least in part a first principles process model and at least in part an empirically based process model for the predictive control during the method and wherein the semiconductor wafer has a diameter of at least 300 millimeters and wherein the semiconductor wafer has a low-k layer having a k value of at most 3.0 and additionally comprising:

changing the cost of manufacture by an appreciable amount.

56. The method according to claim 55 additionally comprising:

using a manufactured article having a processor readable medium with processor readable instructions for performing the method of claim 55.

57. The method according to claim 55 additionally comprising:

supplying a group of an at least three apparatus wherein each member of the group of the at least three apparatus has at least two refining elements and an at least two different refining element identification codes, the refining element identification codes forming a family of an at least six refining element identification codes, each refining element identification code being different from each other;

using an at least one processor having access to the family of the at least six refining element identification codes for the at least three apparatus; and

using a manufactured article having a processor readable medium with processor readable instructions which use the family of the at least six refining element identification codes to determine a change for an at least one control parameter during a refining cycle time.

58. The method according to claim 1 additionally comprising:

supplying a group of an at least three apparatus wherein each member of the group of the at least three apparatus has at least two refining elements and an at least two different refining element identification codes, the refining element identification codes forming a family of an at least six refining element identification codes, each refining element identification code being different from each other;

using an at least one processor having access to the family of the at least six refining element identification codes for the at least three apparatus; and

using a manufactured article having a processor readable medium with processor readable instructions which use the family of the at least six refining element identification codes to determine a change for an at least one control parameter during a refining cycle time.

59. The method according to claim 58 wherein at least one of applying a first refining energy or applying a second refining energy comprises applying an at least one electrochemical energy for removing a material and wherein using an at least one process model comprises using at least in part a first principles process model for the predictive control during the method.

60. The method according to claim 59 additionally comprising:

changing the cost of manufacture by an appreciable amount.

61. The method according to claim 59 additionally comprising:

data mining the stored information.