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Semiconductor device

  • US 7,379,328 B2
  • Filed: 06/20/2007
  • Issued: 05/27/2008
  • Est. Priority Date: 03/12/2004
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device, comprising:

  • a plurality of word lines;

    a plurality of bit lines intersecting with the plurality of word lines;

    a plurality of memory cells disposed on the intersecting points of the plurality of word lines and the plurality of bit lines;

    a plurality of dummy bit lines intersecting with the plurality of word lines;

    a plurality of dummy memory cells disposed on the intersecting points of the plurality of word lines and the plurality of dummy bit lines;

    a plurality of circuits that select columns;

    a plurality of circuits that select word lines;

    a sense amplifier circuit;

    a plurality of write amplifier circuits; and

    a memory array including the plurality of memory cells and the plurality of dummy memory cells, the memory array is separated into at least two sub-arrays, each of the memory arrays having two columns of the dummy memory cells,wherein a high resistance value is written in one of the two columns of the dummy memory cells, and a low resistance value is written in the other one of the two columns of the dummy memory cells.

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