Apparatus and method for asynchronously clocking the processing of a wireless communication signal by multiple processors
First Claim
1. An apparatus for signal processing, comprising:
- (a) a component that enables the communication of a received signal and a transmitted signal with a node;
(b) a plurality of class processors that are in communication with the component, wherein each of the plurality of class processors are separately configurable to asynchronously process at least a portion of the data flow associated with the transmitted signal and another data flow associated with the received signal;
(c) a plurality of clock signals, wherein each class processor is associated with at least one of the plurality of clocks, and wherein at least one clock signal is separately configurable to enable each associated class processor to asynchronously process the data flows associated with the transmitted signal and the received signal; and
(d) a host processor that is in communication with the plurality of class processors, wherein the other data flow associated with the received signal is provided to the host processor after processing by the plurality of class processors, and wherein the data flow associated with the transmitted signal is provided by the host processor to the plurality of class processors for asynchronous processing and communication of the transmitted signal to the node.
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Abstract
The invention is directed to an apparatus, method and system for providing reduced power consumption, fast processing of digitized communication signals and relatively easy reconfiguration for different applications, such as communication protocols/standards. The invention recognizes that the processing of signals associated with different types of communication standards can be recharacterized as deterministic data flows. Also, for each deterministic data flow, several of the same categories of computation are performed in substantially the same manner, albeit in a different order or somewhat differently, that is unique to a particular application. Based on this recharacterization, the invention divides the processing of the deterministic data flow for a communication signal among several Class processors that are separately configurable to optimize their particular category/class of computation in the asynchronous processing of the signal.
48 Citations
31 Claims
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1. An apparatus for signal processing, comprising:
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(a) a component that enables the communication of a received signal and a transmitted signal with a node; (b) a plurality of class processors that are in communication with the component, wherein each of the plurality of class processors are separately configurable to asynchronously process at least a portion of the data flow associated with the transmitted signal and another data flow associated with the received signal; (c) a plurality of clock signals, wherein each class processor is associated with at least one of the plurality of clocks, and wherein at least one clock signal is separately configurable to enable each associated class processor to asynchronously process the data flows associated with the transmitted signal and the received signal; and (d) a host processor that is in communication with the plurality of class processors, wherein the other data flow associated with the received signal is provided to the host processor after processing by the plurality of class processors, and wherein the data flow associated with the transmitted signal is provided by the host processor to the plurality of class processors for asynchronous processing and communication of the transmitted signal to the node. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A modem for signal processing with a wireless communication standard, comprising:
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(a) a reception amplifier for receiving communication of a received signal from a node and a transmission amplifier for enabling communication of a transmitted signal to the node; (b) a plurality of class processors that are in communication with the reception amplifier and the transmission amplifier, wherein at least one of the plurality of class processors are separately configurable to asynchronously process a portion of at least one data flow associated with the transmitted signal and another data flow associated with the received signal; (c) a plurality of clock signals, wherein each class processor is associated with at least one of the plurality of clocks, and wherein at least one clock signal is separately configurable to enable each associated class processor to asynchronously process the data flows associated with the transmitted signal and the received signal; and (d) a host processor that is in communication with the plurality of class processors, wherein the received signal is provided to the host processor after processing by the plurality of class processors, and wherein the transmitted signal is provided by the host processor to the plurality of class processors for processing and communication to the node. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A method for signal processing, comprising:
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(a) receiving a signal from a node and providing a data flow associated with the received signal to a plurality of class processors for asynchronous processing, wherein at least one class processor is separately configurable for asynchronously processing at least a portion of the signal associated with the received signal; (b) providing the asynchronously processed data flow associated with the received signal to a host processor, wherein the host processor is enabled to perform an action based on the content of the asynchronously processed data flow; (c) enabling the host processor to provide another data flow to the plurality of class processors for asynchronous processing, wherein the other data flow is associated with a transmitted signal; and (d) transmitting the transmitted signal to the node, wherein the generation of the transmitted signal is based at least in part on the asynchronously processed other data flow associated with the transmitted signal. - View Dependent Claims (27, 28, 29, 30)
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31. An apparatus for signal processing, comprising:
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(a) means for communicating a received signal and a transmitted signal with a node; (b) means for enabling a plurality of class processors to asynchronously process the data flows associated with the transmitted signal and the received signal, wherein at least one class processor is separately configurable; (c) means for associating at least one of a plurality of clock signals with each class processor, and wherein each clock signal is configurable to enable each associated class processor to asynchronously process the data flows associated with the received and transmitted signals; and (d) means for enabling a host processor to be in communication with the plurality of class processors, wherein a data flow associated with the received signal is provided to the host processor for further actions after processing by at least one of the plurality of class processors, and wherein another data flow associated with the transmitted signal is provided by the host processor to the plurality of class processors for processing and conversion into the transmitted signal for communication to the node; (e) means for providing the other data flow associated with the received signal to the host processor after processing by the plurality of class processors, and means for the data flow associated with the transmitted signal to be provided by the host processor to the plurality of class processors for asynchronous processing and communication of the transmitted signal to the node.
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Specification