Self-calibrating anti-blooming circuit for CMOS image sensor having a spillover protection performance in response to a spillover condition
First Claim
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1. An image sensor array comprising:
- a plurality of imager cells, each including a reset transistor and a well;
each imager cell being operable to selectively provide an output signal indicative of the amount of electrons stored in its well;
a master pixel circuit having an output and having operational characteristics similar to those of one or more of the imager cells;
a reference circuit having an output approximately representative of a maximum output of said imager cells;
an amplifier having as a first input the output of said master pixel circuit, having as a second input the output of said reference circuit, and having an output coupled to an input of said master pixel circuit; and
wherein the amplifier output is used to generate a voltage selectively applied to the reset transistors of at least some of said imager cells.
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Abstract
A method and apparatus to provide blooming protection for a pixel in an array while extending dynamic range.
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Citations
15 Claims
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1. An image sensor array comprising:
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a plurality of imager cells, each including a reset transistor and a well;
each imager cell being operable to selectively provide an output signal indicative of the amount of electrons stored in its well;a master pixel circuit having an output and having operational characteristics similar to those of one or more of the imager cells; a reference circuit having an output approximately representative of a maximum output of said imager cells; an amplifier having as a first input the output of said master pixel circuit, having as a second input the output of said reference circuit, and having an output coupled to an input of said master pixel circuit; and wherein the amplifier output is used to generate a voltage selectively applied to the reset transistors of at least some of said imager cells. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for preventing blooming in an image sensor array comprising the steps of:
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providing a plurality of imager cells, each including a reset transistor and a well;
each imager cell being operable to selectively provide an output signal indicative of the amount of electrons stored in its well;providing a master pixel circuit having an output and having operational characteristics similar to those of one or more of the imager cells; providing a reference circuit having an output approximately representative of a maximum output of said imager cells; providing an amplifier having as a first input the output of said master pixel circuit, having as a second input the output of said reference circuit, and having an output coupled to an input of said master pixel circuit; and applying a voltage selectively to the reset transistors of at least some of said imager cells by using the amplifier output. - View Dependent Claims (8, 9)
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10. A method for preventing a spillover condition in a photosensitive imager containing a plurality of image cells comprising the steps of:
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producing, during an integration time, charge carriers at said imager cells in response to excitation radiation reaching respective imager cells; during said integration time, storing said charge carriers produced at said imager cell up to approximately a certain number and substantially removing from said imager cell any additional charge carriers produced in excess of that approximate number; and wherein the removal is accomplished by shunting said additional charge carriers through a reset transistor coupled to said imager cell, said reset transistor being selectively biased with a reset bias voltage determined in part by an output of a servo loop circuit that compares an output of a master pixel circuit having operating characteristics similar to said imager cells and a reference voltage approximately representative of the maximum linear output of said imager cells. - View Dependent Claims (11)
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12. A photosensitive apparatus, comprising:
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a photodetector and a reset transistor located in an imager cell; a spillover protection device, controlled by an anti-blooming circuit, for applying a bias to said reset transistor in response to a spillover condition. - View Dependent Claims (13, 14, 15)
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Specification