System for reducing calibration time of a power amplifier

• US 7,382,182 B2
• Filed: 06/29/2005
• Issued: 06/03/2008
• Est. Priority Date: 06/29/2005
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Trocke, Robert S., Klomsdorf, Armin W.
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US11/170,208
• Publication Number:
  US 20070001756A1
• Time in Patent Office: 1,070 Days
• Field of Search: 330/2, 330/307, 330/302
• US Class Current: 330/2
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 2200/465 Power sensing
• CPC Class Codes: H03F 2200/468 the temperature being sensed
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/24 of transmitter output stages

Abstract

A system for reducing the calibration time of a Power Amplifier (PA) (202) is provided. The system includes a memory module (304) that is integrated in the PA. The memory module is configured to store one or more calibration parameters of the PA.

Claims

1. A system for reducing calibration time of a Power Amplifier (PA), the system comprising:

a control circuit, the control circuit controlling the operation of the PA;

a memory module integrated in the PA for storing calibration parameters and performance specifications of the PA, wherein the calibration parameters and the performance specifications are used by the control circuit to determine the behavior of the PA;

a bias and load control unit controlling at least one of a bias and a load on the PA;

a communication interface providing access to the memory module;

a temperature sensor providing temperature of the PA to the control circuit; and

a power detector providing output power level of the PA to the control circuit.

2. The system as recited in claim 1, further comprising:

a bias and load control unit controlling at least one of a bias and a load on the PA; and

a communication interface providing access to the memory module.

3. The system as recited in claim 2, wherein the communication interface comprises a Serial Peripheral Interface (SPI), the SPI providing access to the memory module for storing and retrieving calibration parameters from a group consisting of factory measurements, calibration coefficients, Amplitude Modulation (AM) to Amplitude Modulation characteristics, Amplitude Modulation to Phase Modulation (PM) characteristics, device information and device identification.

4. The system as recited in claim 1, wherein the calibration parameters enable open-loop polar modulation.

5. A system for determining behaviour of a Power Amplifier (PA), the system comprising:

a control circuit, the control circuit controlling the operation of the PA;

a memory module integrated in the PA for storing calibration parameters and performance specifications of the PA, wherein the calibration parameters and the performance specifications are used by the control circuit to determine the behavior of the PA and

a switching regulator at the input of the PA, the switching regulator enabling input voltage control of the PA.

7. The system as recited in claim 5, further comprising a Radio Frequency (RF) switch, the RF switch selectively switching on stages of the PA and controlling operation of the control circuit.

6. A system for determining behavior of a Power Amplifier (PA), the system comprising:

a control circuit, the control circuit controlling the operation of the PA;

a memory module integrated in the PA for storing calibration parameters and performance specifications of the PA, wherein the calibration parameters and the performance specifications are used by the control circuit to determine the behavior of the PA; and

a power detector at the input of the PA, the power detector enabling the control circuit to determine a gain of the PA by comparing input power and output power of the PA.

8. A method for producing a power amplifier that minimizes calibration time, the method comprising:

integrating a memory module in the power amplifier;

storing one or more calibration parameters in the memory module controlling at least one of a bias and a load on the PA using a bias and load control unit;

providing access to the memory module using a communication interface;

providing temperature of the PA to the control circuit using a temperature sensor; and

providing output power level of the PA to the control circuit using a power detector.

9. The method of claim 8, further comprising characterizing the one or more calibration parameters.

10. The method of claim 9, wherein characterizing the one or more calibration parameters includes at least one of determining the power amplifier linearity with respect to a bias voltage, determining an amplitude modulation-to-amplitude modulation coefficient and amplitude modulation-to-phase modulation coefficients necessary for polar modulation, and determining at least one lookup table including a power amplifier configuration associated with a particular signal configuration.

11. A method for producing a power amplifier that minimizes calibration time, the method comprising:

integrating a memory module in the power amplifier;

storing one or more calibration parameters in the memory module; and

enabling input voltage control of the PA using a switching regulator at the input of the PA.