CDMA system with separate function channel card

• US 7,382,751 B1
• Filed: 08/07/2000
• Issued: 06/03/2008
• Est. Priority Date: 08/07/2000
• Status: Active Grant

• Current Assignee: National Chung-Shan Institute of Science and Technology
• Original Assignee: Chung-Shan Institute of Science & Technology Armaments Bureau MND (Government of The Republic of China)
• Inventors: Peng, Ming-Shan, Lin, Yin-Kuan, Wu, Kuang-Shyr
• Primary Examiner(s): PHAM, BRENDA H
• Application Number:
  US09/633,828
• Time in Patent Office: 2,857 Days
• Field of Search: 370/294, 370/310.2, 370/312, 370/315, 370/328, 370/334, 370/339, 370/313, 370/314, 370/329, 370/330, 370/336, 370/337, 370/352, 370/354, 370/356, 370/436, 370/401, 370/437, 370/480, 370/442, 370/478
• US Class Current: 370/335
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 2201/70707 Efficiency-related aspects

Abstract

A code division multiple access (CDMA) system having a separate channel card function architecture. The CDMA system includes a back-haul interface module, a controller of a cable network controlling station, a main channel card, a middle frequency module, a radio frequency module, a reception channel card, a random access card, a clock module and a cell controller. The main channel card is responsible for controlling signal transmission while the reception channel card is responsible for signal reception. By separately processing data at a reception terminal and a transmission terminal, similar computations can be processed as groups so that hardware design of the system is very much simplified and signal interference is greatly reduced.

Claims

1. A code division multiple access (CDMA) system having a separate channel card architecture, comprising:

a back-haul interface module connected to a controller of a cable network controlling station for bi-directional base-band digital signal transmission;

a main channel card for receiving the base-band signals from the back-haul interface module and converting the base-band signals into middle frequency signals;

a middle frequency module for receiving the middle frequency signals from the main channel card and outputting the middle frequency signal to a radio frequency module, or receiving middle frequency signals from the radio frequency module;

a reception channel card for receiving middle frequency signals from the middle frequency module, converting the middle frequency signals into base-band signals and outputting the base-band signals to the back-haul interface module;

a random access card for receiving middle frequency signals from the middle frequency module so that a user'"'"'s electronic network can be found when the user'"'"'s mobile telephone is switched on;

a clock module for generating a timing signal to the reception channel card and the random access card; and

a cell controller for outputting control signals to the reception channel card and the clock module or inputting control signals from the reception channel card and the clock module to control the operations of the base station.

2. The CDMA system of claim 1, wherein the main channel card further includes a processor, an application specific integrated circuit/field programmable gate array and a digital/analogue converter.

3. The CDMA system of claim 2, wherein the processor performs functions that include cyclic redundancy check, convolution encoding, rate matching and interleave encoding.

4. The CDMA system of claim 2, wherein the application specific integrated circuit/field programmable gate array performs functions that include power control and code spreading, and the application specific integrated circuit/field programmable gate array further includes a combining module and a modulation module.

5. The CDMA system of claim 1, wherein the radio frequency module outputs radio frequency signals to an antenna or receives radio frequency signals from the antenna followed by converting the radio frequency signals into middle frequency signals.

6. The CDMA system of claim 1, wherein the reception channel card further includes a processor, an application specific integrated circuit/field programmable gate array and an analogue/digital converter.

7. The CDMA system of claim 6, wherein the processor performs functions that include cyclic redundancy check decoding, Viterbi decoding, rate matching decoding, interleave decoding, power control and bus connection between channel card and channel master.

8. The CDMA system of claim 6, wherein the application specific integrated circuit/field programmable gate array further includes a combining module and a RAKE receiver and the application specific integrated circuit/field programmable gate array performs functions that include demodulation, de-spreading, peak detection, Gold/Walsh code generation, channel estimation and receiver synchronization.