Semiconductor device and manufacturing method therefor

• US 7,385,239 B2
• Filed: 08/01/2006
• Issued: 06/10/2008
• Est. Priority Date: 05/28/2004
• Status: Active Grant

• Current Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Wang, Wensheng
• Primary Examiner(s): Menz; Douglas M
• Application Number:
  US11/496,639
• Publication Number:
  US 20060273367A1
• Time in Patent Office: 679 Days
• Field of Search: 257/295, 438/3
• US Class Current: 257/295
• CPC Class Codes: H01L 28/57 comprising a barrier layer to prevent diffusion of hydrogen or oxygen
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H10B 53/00 Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
• CPC Class Codes: H10B 53/30 characterised by the memory core region

Abstract

A ferroelectric capacitor having a bottom electrode (9a), a ferroelectric film (10a) and a top electrode (11a) is formed above a semiconductor substrate (1). The ferroelectric film (10a) is constituted of CSPZT with 0.1-5 mol % of La and 0.1-5 mol % of Nb.

Claims

1. A semiconductor device comprising:

a semiconductor substrate; and

a ferroelectric capacitor comprising;

a ferroelectric film formed over said semiconductor substrate, said ferroelectric film being constituted of a substance of which chemical formula is expressed by ABO₃, added with La and Nb;

a first top electrode film formed on said ferroelectric film, said first top electrode film including an oxide of Ir, and

a second top electrode film formed on said first top electrode film, said second top electrode film including Ir,

wherein an oxygen composition of said first top electrode film is smaller than that of said second top electrode film.

2. The semiconductor device according to claim 1, wherein a content of La in said ferroelectric film is 0.1 to 5 mol %.

3. The semiconductor device according to claim 1, wherein a content of Nb in said ferroelectric film is 0.1 to 5 mol %.

4. The semiconductor device according to claim 1, herein a content of La is 0.1 to 5 mol % and a content of Nb is 0.1 to 5 mol % in said ferroelectric film.

5. The semiconductor device according to claim 1, wherein a crystal structure of said substance constituting said ferroelectric film is either a perovskite structure or a bismuth layer structured ferroelectrics.

6. The semiconductor device according to claim 1, wherein said substance constituting said ferroelectric film includes at least one kind of elements selected from the group consisting of Pb, Sr, Ca, Bi, Ba, Li and Y, in the A-site.

7. The semiconductor device according to claim 1, said substance constituting said ferroelectric film includes at least one kind of elements selected from the group consisting of Ti, Zr, Hf, V, Ta, W, Mn, Al, Bi and Sr, in the B-site.

8. The semiconductor device according to claim 1, wherein a chemical formula of said substance constituting said ferroelectric film is expressed by one kind selected from the group consisting of:

Pb(Zr,Ti)O₃,

(Pb,Ca)(Zr,Ti)O₃,

(Pb,Ca)(Zr,Ti,Ta)O₃,

(Pb,Ca)(Zr,Ti,W)O₃,

(Pb,Sr)(Zr,Ti)O₃,

(Pb,Sr)(Zr,Ti,W)O₃,

(Pb,Sr)(Zr,Ti,Ta)O₃,

(Pb,Ca,Sr)(Zr,Ti)O₃,

(Pb,Ca,Sr)(Zr,Ti,W)O₃,

(Pb,Ca,Sr)(Zr,Ti,Ta)O₃,

SrBi₂Ta₂O₉,

Bi₄Ti₃O₉, and

BaBi₂Ta₂O₉.

9. The semiconductor device according to claim 8, wherein Si is further added to said substance constituting said ferroelectric film.

10. The semiconductor device according to claim 1, wherein said ferroelectric capacitor comprises a bottom electrode including at least one kind of elements selected from the group consisting of Pt, Ir, Ru, Rh, Re, Os and Pd.

11. The semiconductor device according to claim 1, wherein said ferroelectric capacitor comprises a bottom electrode including an oxide of at least one kind of elements selected from the group consisting of Pt, Ir, Ru, Rh, Re, Os and Pd.

12. The semiconductor device according to claim 1, further comprising a memory cell array having said ferroelectric capacitors in a plurality of numbers.

13. The semiconductor device according to claim 12, wherein each memory cell constituting said memory cell array comprises:

said ferroelectric capacitor as a memory portion; and

a transistor connected to said ferroelectric capacitor as a switching portion.

14. The semiconductor device according to claim 12, wherein each memory cell constituting said memory cell array comprises said ferroelectric capacitor as a memory portion and a switching portion.

15. The semiconductor device according to claim 1, wherein the composition of the second top electrode film is off the stoichiometric composition of the oxide of Ir.

16. A manufacturing method of a semiconductor device comprising the step of:

forming a ferroelectric capacitor above a semiconductor substrate, said ferroelectric capacitor comprising a ferroelectric film, a first top electrode film formed on said ferroelectric film, said first top electrode film including an oxide of Ir, and a second top electrode film formed on said first top electrode film, said second top electrode film including Ir,

wherein said ferroelectric film is constituted of a substance of which chemical formula is expressed by ABO₃, added with La and Nb,

wherein an oxygen composition of said first top electrode film is smaller than that of said second top electrode film.

17. The manufacturing method of a semiconductor device according to claim 16, wherein a content of La in said ferroelectric film is set at 0.1 to 5 mol %.

18. The manufacturing method of a semiconductor device according to claim 16, wherein a content of Nb in said ferroelectric film is set at 0.1 to 5 mol %.

19. The manufacturing method of a semiconductor device according to claim 16, wherein a content of La is set at 0.1 to 5 mol %, and a content of Nb is set at 0.1 to 5 mol % in said ferroelectric film.

20. The manufacturing method of a semiconductor device according to claim 16, wherein the composition of the second top electrode film is off the stoichiometric composition of the oxide of Ir.