Method to improve the resolution of time measurements and alignment in packet networks by time modulation

• US 7,385,990 B2
• Filed: 07/21/2003
• Issued: 06/10/2008
• Est. Priority Date: 07/21/2003
• Status: Active Grant

• Current Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Original Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Inventors: Roos, Steven, Simons, Petrus W., Repko, Willem L., Van Der Valk, Robertus L.
• Primary Examiner(s): Chan; Wing
• Assistant Examiner(s): Cho; Hong Sol
• Application Number:
  US10/624,068
• Publication Number:
  US 20050053076A1
• Time in Patent Office: 1,786 Days
• Field of Search: 370/395.62, 370/503, 370/509, 370/512, 370516-518
• US Class Current: 370/395.62
• CPC Class Codes: H04J 3/0632 Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES] queuing arrangements in packet switching elements H04L49/90; synchronising systems for the synchronous transmission of a pulse code modulated video signal with one or more other pulse code modulated signals H04N7/56
• CPC Class Codes: H04J 3/12 Arrangements providing for calling or supervisory signals
• CPC Class Codes: H04J 9/00 Multiplex systems in which each channel is represented by a different type of modulation of the carrier

Abstract

A method of recovering timing information in a packet network is disclosed wherein a modulation scheme is used to transport additional information required for clock recovery between the sender and receiver across the network.

Claims

1. A method of recovering timing information over multiple asynchronous packet networks, each having its own time grid, comprising:

transmitting timestamped packets between a sender on a first said network and a receiver on a second said network;

transporting timing information between the sender and receiver as a modulated signal comprising a modulation in the rate of sending out the timestamped packets transmitted between the sender and receiver;

extracting said timing information from the packets arriving at the receiver; and

using said timing information at the receiver to align the time grid at the receiver with the time grid at the sender; and

wherein said modulated signal is manifested as an offset in the rate of transmission of packets from the sender, said offset being an odd fraction ƒ

of a cycle of a clock signal such that the timing error at the receiver contains only high frequency components, and wherein the packet rate is offset by an amount equal to the ratio of the packet cycle and clock cycle multiplied by ƒ

.

2. The method of claim 1, wherein said modulated signal is frequency or phase modulated.

3. The method of claim 1, wherein a phase locked loop is provided at the receiver to remove timing errors arising between the last node in the path of a packet across the network and the receiver.

4. The method of claim 1, wherein said modulated signal uses sinusoidal modulation.

5. The method of claim 1, wherein said modulated signal is the summation of two sinusoidal waveforms.

6. The method of claim 1, wherein said modulated signal uses a sawtooth or form of modulation.

7. The method of claim 1, wherein said modulated signal uses pseudo-random modulation.

8. A method of recovering timing information in a packet network, wherein a modulated signal is used to transport additional information required for clock recovery between the sender and receiver across the network, wherein said modulated signal is manifested as an offset in the rate of transmission of packets from the sender, said offset being an odd fraction ƒ

of a cycle of a clock signal such that the timing error at the receiver contains only high frequency components, and wherein the packet rate is offset by an amount equal to the ratio of the packet cycle and clock cycle multiplied by ƒ

.

9. The method of claim 8, wherein ƒ

is 5/32.

10. The method of claim 8, wherein ƒ

is 27/32.

11. The method of claim 8, wherein said high frequency components are filtered out at the receiver.

12. In a packet network linking a sender and receiver, an apparatus for recovering timing information across the network at the receiver comprising:

a modulator at the sender for sending a modulated signal across the network conveying timing information; and

a clock recovery unit at the receiver using said modulated signal to improve the accuracy of the recovered clock; and

a control unit coupled to said modulator for varying the precise time of departure of outgoing packets to provide said modulated signal, said control unit varying the time of transmission of said packets to provide an offset in rate the transmission of said packets,

wherein said offset is an odd fraction ƒ

of a cycle of a clock signal such that the timing error at the receiver contains only high frequency components; and

wherein the packet rate is offset by an amount equal to the ratio of the packet cycle and clock cycle multiplied by ƒ

.

13. The apparatus as claimed in claim 12 wherein said recovery unit includes a synchronous detector for determining the precise time of arrival of an incoming packet.

14. The apparatus as claimed in claim 13, wherein the sender and receiver each include a local timebase as a reference.

15. The apparatus as claimed in claim 12 wherein said modulator is connected to a network interface unit.

16. The apparatus of claim 12, wherein ƒ

is 5/32.

17. The apparatus of claim 12, wherein ƒ

is 27/32.

18. The apparatus of claim 12 further comprising a phase locked loop at the receiver for removing errors arising in the last link of the network before the receiver.