Data analysis method for integrated circuit process and semiconductor process
First Claim
1. A data analysis method for an IC process, used to analyze results of at least an in-line quality test, a product test and a yield test conducted to a plurality of products of the IC process, comprising:
- dividing the products into a normal group and an abnormal group based on the result of the in-line quality test;
dividing the products into a qualified group and an unqualified group based on the result of the yield test; and
conducting a categorization step to define an intersection of the unqualified group and the normal group as a first problematic group and to define an intersection of the unqualified group and the abnormal group as a second problematic group.
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Abstract
A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal group based on the result of the in-line quality test, and are divided into a qualified group and an unqualified group based on the result of the yield test. A categorization step is performed to define the intersection of the unqualified group and the normal group as a first problematic group and to define the intersection of the unqualified group and the abnormal group as a second problematic group. By analyzing one or both of the two problematic groups, the major yield killer can be identified so that process modification can be made accordingly to improve the yield.
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Citations
15 Claims
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1. A data analysis method for an IC process, used to analyze results of at least an in-line quality test, a product test and a yield test conducted to a plurality of products of the IC process, comprising:
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dividing the products into a normal group and an abnormal group based on the result of the in-line quality test; dividing the products into a qualified group and an unqualified group based on the result of the yield test; and conducting a categorization step to define an intersection of the unqualified group and the normal group as a first problematic group and to define an intersection of the unqualified group and the abnormal group as a second problematic group. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A data analysis method for a semiconductor process, used to analyze results of at least a defect inspection, a wafer acceptance test (WAT) and a yield test conducted to a wafer that has been subject to a plurality of fabricating steps and having a plurality of dies thereon, comprising:
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dividing the dies into a normal group and an abnormal group based on the result of the defect inspection; dividing the dies into a qualified group and an unqualified group based on the result of the yield test; and performing a categorization step to define an intersection of the unqualified group and the normal group as a first problematic group and to define an intersection of the unqualified group and the abnormal group as a second problematic group. - View Dependent Claims (12, 13, 14, 15)
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Specification