Method of finding driving strength and computer accessible record medium to store program thereof

• US 7,389,488 B2
• Filed: 05/25/2005
• Issued: 06/17/2008
• Est. Priority Date: 05/25/2005
• Status: Expired due to Fees

• Current Assignee: Faraday Technology Corp.
• Original Assignee: Faraday Technology Corp.
• Inventors: Chen, Peter H., Chien, Chih-Fu, Liu, Han-Chi, Wang, Jyh-Herng
• Primary Examiner(s): Dinh, Paul
• Assistant Examiner(s): Memula, Suresh
• Application Number:
  US10/908,748
• Publication Number:
  US 20060271889A1
• Time in Patent Office: 1,119 Days
• Field of Search: 716/10, 716 4- 6, 716/17
• US Class Current: 716/111
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

A method of finding a driving strength and a record medium accessible by a computer to store a program thereof are provided. The method is adapted to find the driving strength of an output pin of a target cell. Wherein, the driving strength of the output pin of the target cell is provided from the driving strength of a corresponding last level device. In this method, at least one candidate standard cell is searched in a standard cell library according to the last level device. Then, the driving strength of the target cell is interpolated between the driving strengths of the candidate standard cells to obtain the driving strength of the output pin of the target cell.

Claims

1. A method for finding a driving strength of at least one output pin of a target cell, comprising:

determining whether the output pin of the target cell being a digital external pin;

searching a plurality of candidacy standard cells in a standard cell library according to a last level device within the target cell which being connected to the output pin of the target cell and used for providing the driving strength to the output pin of the target cell when the output pin of the target cell being not the digital external pin;

establishing a standard cell candidacy table according to the candidacy standard cells, wherein the standard cell candidacy table comprises driving strengths of the candidacy standard cells;

performing interpolation calculation between the driving strengths of the candidacy standard cells so as to obtain the driving strength of the output pin of the target cell; and

analyzing a partial circuit of the target cell so as to obtain the driving strength of the output pin of the target cell if the interpolation calculation between the driving strengths of the candidacy standard cells being incapable of obtaining the driving strength of the output pin of the target cell;

wherein the partial circuit of the target cell comprises a partial circuit of the last level device and a partial circuit of at least one second last level device within the target cell which is connected to input terminals of the last level device and used for driving the last level device.

2. The method according to claim 1, further comprising:

providing at least one testing signal to input terminal s of the second last level device; and

measuring the output pin of the target cell so as to obtain the driving strength of the output pin of the target cell.

3. The method according to claim 1, wherein if the output pin of the target cell is the digital external pin, the method further comprises:

determining whether the last level device connected to the output pin of the target cell being a standard input/output (IO) cell, wherein the standard IO cell comprises a pad for external connection;

removing connection of an input terminal of the last level device if the last level device being the standard IO cell;

providing at least one testing signal to the input terminal of the last level device; and

measuring the output pin of the target cell so as to obtain the driving strength of the output pin of the target cell.

4. The method according to claim 3, further comprising:

using a HSPICE software to simulate and analyze the target cell so as to obtain the driving strength of the output pin of the target cell if the last level device being not the standard IO cell.

5. The method according to claim 1, wherein before the step of “

determining whether the output pin of the target cell being a digital external pin”

, the method further comprises;

establishing a mapping table between a cell library of the target cell and the standard cell library;

establishing an input/output pin table of the target cell; and

selecting output pins of the target cell one by one according to the input/output pin table of the target cell.

6. The method according to claim 1, wherein the target cell is an intellectual property (IP) cell.

7. The method according to claim 6, wherein the IP cell is described by a hardware description language (HDL).

8. The method according to claim 1, wherein the driving strength of the output pin of the target cell represents a maximum load capacitance driven by the output pin of the target cell.

9. A record medium accessible by a computer to execute a program stored in a computer system, the program comprising the following commands:

accessing a target cell, wherein the target cell comprises at least one output pin;

determining whether the output pin of the target cell being a digital external pin;

searching a plurality of candidacy standard cells in a standard cell library according to a last level device within the target cell which being connected to the output pin of the target cell and used for providing the driving strength to the output pin of the target cell when the output pin of the target cell being not the digital external pin;

establishing a standard cell candidacy table according to the candidacy standard cells, wherein the standard cell candidacy table comprises driving strengths of the candidacy standard cells;

performing interpolation calculation between the driving strengths of the candidacy standard cells so as to obtain the driving strength of the output pin of the target cell; and

analyzing a partial circuit of the target cell so as to obtain the driving strength of the output pin of the target cell if the interpolation calculation between the driving strengths of the candidacy standard cells being incapable of obtaining the driving strength of the output pin of the target cell;

wherein the partial circuit of the target cell comprises a partial circuit of the last level device and a partial circuit of at least one second last level device within the target cell which is connected to input terminals of the last level device and used for driving the last level device.

10. The record medium accessible by a computer according to claim 9, wherein the program further comprises the following commands:

providing at least one testing signal to input terminals of the second last level device; and

measuring the output pin of the target cell so as to obtain the driving strength of the output pin of the target cell.

11. The record medium accessible by a computer according to claim 9, wherein if the output pin of the target cell is the digital external pin, the program further comprises the following commands:

determining whether the last level device connected to the output pin of the target cell being a standard input/output (IO) cell, wherein the standard IO cell comprises a pad for external connection;

removing connection of an input terminal of the last level device if the last level device being the standard IO cell;

providing at least one testing signal to the input terminal of the last level device; and

measuring the output pin of the target cell so as to obtain the driving strength of the output pin of the target cell.

12. The record medium accessible by a computer according to claim 11, wherein the program further comprises the following command:

using a HSPICE software to simulate and analyze the target cell so as to obtain the driving strength of the output pin of the target cell if the last level device being not the standard IO cell.

13. The record medium accessible by a computer according to claim 9, wherein before the command of “

determining whether the output pin of the target cell being a digital external pin” and

after the command of “

accessing a target cell”

, the program comprises the following commands;

establishing a mapping table between a cell library of the target cell and the standard cell library;

establishing an input/output pin table of the target cell; and

selecting output pins of the target cell one by one according to the input/output pin table of the target cell.

14. The record medium accessible by a computer according to claim 9, wherein the target cell is an IP cell.

15. The record medium accessible by a computer according to claim 14, wherein the IP cell is described by a HDL.

16. The record medium accessible by a computer according to claim 9, wherein the driving strength of the output pin of the target cell represents a maximum load capacitance driven by the output pin of the target cell.