Global positioning system receiver and correlating circuit thereof

• US 7,391,364 B2
• Filed: 11/01/2004
• Issued: 06/24/2008
• Est. Priority Date: 11/06/2003
• Status: Expired due to Fees

• Current Assignee: MediaTek, Inc.
• Original Assignee: Prolific Technology Inc.
• Inventors: Hsu, Chia-Chang
• Primary Examiner(s): Tarcza; Thomas H.
• Assistant Examiner(s): Nguyen; Nga X
• Application Number:
  US10/979,342
• Publication Number:
  US 20050151684A1
• Time in Patent Office: 1,331 Days
• Field of Search: 342/357.06, 34235712-35713, 342/357.15, 342/378
• US Class Current: 342/357.68
• CPC Class Codes: G01S 19/29 carrier including Doppler, related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence

Abstract

A global positioning system receiver and a correlating circuit thereof are disclosed. They sequentially and in parallel generate the portion of bits of the C/A code representing the satellite, sequentially and in parallel generate the portion of bits of the corrected frequency code of Doppler effect, and sequentially outputs the portion of bits of the C/A code and the corrected frequency code therefrom for multiplying the data and the IF data and for adding the products therefrom for generating the total summation value. Therefore, the correlating circuit having portable process is formed. Moreover, an external memory is used to store the sample digital data for reducing costs.

Claims

1. A correlating circuit of a Global Positioning System (GPS) receiver, comprising:

a data receiving register, adapted to store a sampled digital data as an IF data;

an interface controller coupled to the data receiving register and an external memory, for sequentially transmitting data sent from an RF front end from the external memory to the data receiving register; and

a correlator coupled to the data receiving register, adapted to receive the IF data and identify a transmission satellite transmitting the IF data among a plurality of satellites, according to a operation of the IF data, each of C/A codes of the satellites, and each of corrected frequency codes for correcting Doppler effect, comprising;

a C/A code generating unit, sequentially and in parallel generating and outputting a portion of bits of each of the C/A codes representing each of the satellites;

a Doppler generating unit, sequentially and in parallel generating and outputting a portion of bits of each of the corrected frequency codes for correcting Doppler effect;

a multiplication unit coupled to the C/A code generating unit and the Doppler generating unit, sequentially multiplying the portion of bits of each of the C/A codes from the C/A code generating unit, the portion of bits of each of the corrected frequency codes from the parallel Doppler generating unit, and the IF data; and

a digital summation and peak detector coupled to the multiplication unit, adding products therefrom for generating a plurality of summation values and searching a maximum among the summation values thereof for identifying the satellite transmitting the IF data.

2. The correlating circuit of a GPS receiver of claim 1, wherein the data receiving register has two regions for storing the IF data with different time periods, and the interface controller uses the memory regions in turn.

3. The correlating circuit of a GPS receiver of claim 1, wherein the C/A code generating unit comprises a C/A code phase loop controller adapted to sequentially output the portion of bits of each of the C/A codes.

4. The correlating circuit of a GPS receiver of claim 1, wherein the Doppler generating unit comprises a Doppler frequency loop controller adapted to sequentially output the portion of bits of each of the corrected frequency codes.

5. The correlating circuit of a GPS receiver of claim 1, wherein the summation and peak detector comprises:

a digital adder coupled to the multiplication unit, adapted to adding the products therefrom for generating a plurality of I summations and a plurality of Q summations;

a square and radical calculator coupled to the digital adder, for receiving the I and Q summations and square-rooting a plurality of quadratic sums of the I and Q summations thereof;

an integrator coupled to the square and radical calculator, adapted to integrated the quadratic sums therefrom during a period of time; and

a peak detector coupled to the integrator, adapted to search a maximum of the integrated quadratic sums for identifying the transmission satellite transmitting the IF data among the satellites.

6. The correlating circuit of a GPS receiver of claim 5, wherein the period of time is adjustable.

7. The correlating circuit of a GPS receiver of claim 1, wherein the multiplication unit can multiply 31, 32, 33, 62, 64, 66, 128 or more bits each time.

8. A global positioning system (GPS) receiver, comprising:

an RF front-end, adapted to receive, demodulate and sampled a RF signal for generating an IF data and storing in an external memory;

a data receiving register;

an interface controller, coupling to the data receiving register and the external memory, for sequentially removing the IF data from the external memory to the data receiving register;

a correlator adapted to receive the IF data and identify a transmission satellite transmitting the IF data among a plurality of satellites, according to a operation of the IF data, each of C/A codes of the satellites, and each of corrected frequency codes for correcting Doppler effect, comprising;

a C/A code generating unit, sequentially and in parallel generating and outputting a portion of bits of each of the C/A codes representing each of the satellites;

a Doppler generating unit, sequentially and in parallel generating and outputting a portion of bits of each of the corrected frequency codes for correcting Doppler effect;

a multiplication unit coupled to the C/A code generating unit and the Doppler generating unit, sequentially multiplying the portion of bits of each of the C/A codes from the C/A code generating unit, the portion of bits of each of the corrected frequency codes from the parallel Doppler generating unit, and the IF data; and

a digital summation and peak detector coupled to the multiplication unit, adding products therefrom for generating a plurality of summation values and searching a maximum among the summation values thereof for identifying the satellite transmitting the IF data;

a data extractor coupled to the correlating circuit, adapted to extract a navigation data from the IF data; and

a navigation processor coupled to the data extractor, adapted to receive the navigation data for generating a longitude-latitude data and a standard time data.

9. The GPS receiver of claim 8, wherein the data receiving register has two regions for storing the IF data with different time periods, and the interface controller uses the memory regions in turn.

10. The GPS receiver of claim 8, wherein the C/A code generating unit comprises a C/A code phase loop controller adapted to sequentially output the portion of bits of each of the C/A code.

11. The GPS receiver of claim 8, wherein the Doppler generating unit comprises a Doppler frequency loop controller adapted to sequentially output the portion of bits of each of the corrected frequency code.

12. The GPS receiver of claim 8, wherein the summation and peak detector comprises:

a digital adder coupled to the multiplication unit, adapted to adding the products therefrom for generating a plurality of I summations and a plurality of Q summations;

a square and radical calculator coupled to the digital adder, for receiving the I and Q summations and square-rooting a plurality of quadratic sums of the I and Q summations thereof;

an integrator coupled to the square and radical calculator, adapted to integrate the quadratic sums therefrom during a period of time; and

a peak detector coupled to the integrator, adapted to search a maximum of the integrated quadratic sums for identifying the transmission satellite transmitting the IF data among the satellites.

13. The GPS receiver of claim 12, wherein the period of time is adjustable.

14. The GPS receiver of claim 12, wherein the multiplication unit can multiply 31, 32, 33, 62, 64, 66, 128 or more bits each time.

15. The GPS receiver of claim 8, further comprises N correlators.

16. The GPS receiver of claim 15, wherein N is 8, 10, 12 or more.