Sleep protection
First Claim
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1. A method comprisingstoring unencrypted secrets in a memory of a system;
- setting a first flag in a secrets store to indicate that the memory contains unencrypted secrets;
setting a second flag in a sleep enable store to request a sleep controller to cause the system to enter one of a plurality of sleep states by powering down at least one of a plurality of system components;
determining which of the plurality of sleep states to enter based on a sleep type store, wherein the type of sleep state determines which of the plurality of system components to power down and the wake-up latency of the system;
detecting a sleep attack,determining that the memory contains unencrypted secrets based on the secrets store; and
before entering a sleep state, in response to determining that the memory contains unencrypted secrets based on the secrets store, invoking a sleep attack response that protects the unencrypted secrets from the sleep attack, the sleep attack response including one or more from the group of generating a system reset event, generating a system halt event, generating a system shutdown event, generating a system power off event, powering circuitry used to protect the unencrypted secrets during the sleep state, or erasing the memory.
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Abstract
Methods, apparatus and machine-readable medium are described that attempt to protect secrets from sleep attacks. In some embodiments, the secrets are encrypted and a security enhanced environment dismantled prior to entering a sleep state. Some embodiments further re-establish a security enhanced environment and decrypt the secrets in response to a wake event.
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Citations
23 Claims
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1. A method comprising
storing unencrypted secrets in a memory of a system; -
setting a first flag in a secrets store to indicate that the memory contains unencrypted secrets; setting a second flag in a sleep enable store to request a sleep controller to cause the system to enter one of a plurality of sleep states by powering down at least one of a plurality of system components; determining which of the plurality of sleep states to enter based on a sleep type store, wherein the type of sleep state determines which of the plurality of system components to power down and the wake-up latency of the system; detecting a sleep attack, determining that the memory contains unencrypted secrets based on the secrets store; and before entering a sleep state, in response to determining that the memory contains unencrypted secrets based on the secrets store, invoking a sleep attack response that protects the unencrypted secrets from the sleep attack, the sleep attack response including one or more from the group of generating a system reset event, generating a system halt event, generating a system shutdown event, generating a system power off event, powering circuitry used to protect the unencrypted secrets during the sleep state, or erasing the memory. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A chipset to support a processor in a system, comprising
a secrets store to indicate whether a memory in the system contains unencrypted secrets; -
a sleep controller; a sleep enable store to request the sleep controller to cause the system to enter one of a plurality of sleep states by powering down at least one of a plurality of system components; a sleep type store to indicate which of the plurality of sleep states to enter, wherein the indication determines which of the plurality of system components to power down and the wake-up latency of the system; sleep attack detection logic to detect a sleep attack and determine that the memory contains secrets based on the secrets store, in response to a request from the processor to enter the sleep state and to invoke an attack response before entering the sleep state, where the sleep attack response includes one or more from the group of generating a system reset event, generating a system halt event, generating a system shutdown event, generating a system power off event, powering circuitry used to protect the unencrypted secrets during the sleep state, or erasing the memory. - View Dependent Claims (8, 9)
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10. A system comprising an operating system and a more privileged monitor,
the operating system to store unencrypted secrets in system memory; -
receive a first flag in a secrets store to indicate the memory contains unencrypted secrets; receive a second flag in a sleep enable store to request a sleep controller, to enter a sleep state by powering down at least one of a plurality of system components based on the sleep state type, determine which of the plurality of sleep states to enter based on a sleep type store, wherein the type of sleep state determines which of the plurality of system components to power down and the wake-up latency of the system, and to transfer processing of the sleep event to the monitor, and the monitor, based on a secrets store that indicates whether a memory contains unencrypted secrets and in response to the sleep event and before the system enters the sleep state, to encrypt one or more pages of the memory and to indicate that the memory contains no unencrypted secrets. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A system comprising
volatile memory comprising security enhanced regions, a secrets store to indicate whether the volatile memory contains unencrypted secrets, a sleep controller; -
a sleep enable store to request the sleep controller, in response to a sleep event, to cause the system to enter one of a plurality of sleep states by powering down at least one of a plurality of system components; a sleep type store to indicate which of the plurality of sleep states to enter, wherein the indication determines which of the plurality of system components to power down and the wake-up latency of the system; sleep attack detection logic to invoke a sleep attack response before entry into the sleep state, in response to the sleep enable store being updated to invoke entry into the sleep state and the secrets store indicating that the volatile memory contains unencrypted secrets, where the sleep attack response includes one or more from the group of; generating a system reset event, generating a system halt event, generating a system shutdown event, generating a system power off event, powering circuitry used to protect the unencrypted secrets during the sleep state such as a processor to encrypt the security enhanced regions in response to the sleep event and to update the secrets store to indicate that the volatile memory contains no unencrypted secrets in response to encrypting the security enhanced regions, or erasing the memory. - View Dependent Claims (18, 19, 20)
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21. A machine-readable medium comprising a plurality of instructions that in response to being executed, result in a system
setting a first flag in a secrets store to indicate that the memory contains unencrypted secrets; -
in response to a sleep event, setting a second flag in a sleep enable store to request a sleep controller to cause the system to enter one of a plurality of sleep states by powering down at least one of a plurality of system components; determining which of the plurality of sleep states to enter based on a sleep type store, wherein the type of sleep state determines which of the plurality of system components to power down and the wake-up latency of the system; detecting a sleep attack; determining that the memory contains unencrypted secrets based on the secrets store; before entering the sleep state, in response to determining that the memory contains unencrypted secrets based on the secrets store, encrypting contents of the memory, and generating a contents attestation that attests to the contents of the memory. - View Dependent Claims (22, 23)
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Specification