Dynamically partitioning processing across plurality of heterogeneous processors

• US 7,392,511 B2
• Filed: 09/25/2003
• Issued: 06/24/2008
• Est. Priority Date: 03/22/2001
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hofstee, Harm Peter, Minor, Barry L, Nutter, Mark Richard, Brokenshire, Daniel Alan
• Primary Examiner(s): Zhen; Wei Y.
• Assistant Examiner(s): Nguyen; Phillip H
• Application Number:
  US10/670,824
• Publication Number:
  US 20050081181A1
• Time in Patent Office: 1,734 Days
• Field of Search: None
• US Class Current: 717/143
• CPC Class Codes: G06F 15/16 Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs coordinating program control therefor G06F9/52; in regulating and control system G05B
• CPC Class Codes: G06F 9/30061 Multi-way branch instructions, e.g. CASE
• CPC Class Codes: G06F 9/4862 the task being a mobile agent, i.e. specifically designed to migrate
• CPC Class Codes: H04L 63/168 above the transport layer
• CPC Class Codes: H04L 65/1101 Session protocols
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 67/34 involving the movement of software or configuration parameters network booting or remote initial program loading [RIPL] G06F9/4416

Abstract

A program is into at least two object files: one object file for each of the supported processor environments. During compilation, code characteristics, such as data locality, computational intensity, and data parallelism, are analyzed and recorded in the object file. During run time, the code characteristics are combined with runtime considerations, such as the current load on the processors and the size of the data being processed, to arrive at an overall value. The overall value is then used to determine which of the processors will be assigned the task. The values are assigned based on the characteristics of the various processors. For example, if one processor is better at handling intensive computations against large streams of data, programs that are highly computationally intensive and process large quantities of data are weighted in favor of that processor. The corresponding object is then loaded and executed on the assigned processor.

Claims

1. A computer-implemented method to load objects in a heterogeneous multiprocessor computer system, said method comprising:

analyzing a source program for one or more program characteristics, the program characteristics selected from the group consisting of data locality, computational intensity, and data parallelism;

in response to the analyzing, compiling the source program into two object files, a first object file corresponding to a first instruction set and a second object file corresponding to a second instruction set;

in response to the compiling, storing the program characteristics in each of the object files;

receiving a request to execute a software task corresponding to the source program;

selecting a processor from a plurality of dislike processors, wherein a first processor corresponds to the first instruction set and a second processor corresponds to the second instruction set, to execute the software task, the selecting comprising comparing one or more characteristics of the software task with the program characteristics stored in the first object file and the second object file;

in response to selecting the first processor;

loading the first object file into a shared memory, wherein the shared memory is shared by the plurality of dislike processors; and

executing the loaded first object file by the first processor; and

in response to selecting the second processor;

loading the second object file into the shared memory; and

executing the loaded second object file by the second processor.

2. The method as described in claim 1 wherein selecting the processor further comprises:

retrieving the program characteristics;

retrieving current system characteristics, wherein the current system characteristics includes processor load characteristics for the plurality of dislike processors; and

combining the program characteristics and the current system characteristics to determine which of the dislike processors to assign the software task.

3. The method as described in claim 2 wherein at least one of the current system characteristics is selected from the group consisting of processor availability for each of the dislike processors, and a data size of data being processed by the software task.

4. The method as described in claim 1 wherein executing the first object file by the first processor further comprises:

determining that the first processor has a scheduler that schedules tasks for the first processor; and

scheduling the first object file to execute on the first processor, the scheduling including;

writing a software code identifier corresponding to the first object file to a run queue corresponding to the first processor.

5. The method as described in claim 1 wherein executing the second object file by the second processor further comprises:

signaling the second processor; and

reading, by the second processor, the second object file from the shared memory into a local memory corresponding to the second processor.

6. The method as described in claim 5 further comprising:

writing an instruction block in the shared memory, the instruction block including an address of the loaded second object file and an address of an input buffer; and

reading the loaded second object file and the input buffer from the locations identified in the instruction block to the second processor'"'"'s local memory.

7. The method as described in claim 6 further comprising:

signaling the second processor from one of the other processors, the signaling including;

writing the address of the instruction block to a mailbox that corresponds to the second processor; and

reading, by the second processor, the instruction block in response to the signal.