Susceptor

• US 7,393,418 B2
• Filed: 09/22/2005
• Issued: 07/01/2008
• Est. Priority Date: 09/29/2004
• Status: Active Grant

• Current Assignee: CoorsTek KK (Trelleborg AB)
• Original Assignee: Covalent Materials Corporation
• Inventors: Yokogawa, Masanari
• Primary Examiner(s): Hassanzadeh; Parviz
• Assistant Examiner(s): BERNARD, VIJI
• Application Number:
  US11/231,938
• Publication Number:
  US 20060065196A1
• Time in Patent Office: 1,013 Days
• Field of Search: 118/728, 156/345.51
• US Class Current: 118/728
• CPC Class Codes: C23C 16/4581 characterised by material of construction or surface finish of the means for supporting the substrate
• CPC Class Codes: C23C 16/4584 the substrate being rotated
• CPC Class Codes: C30B 25/12 Substrate holders or susceptors
• CPC Class Codes: C30B 31/14 Substrate holders or susceptors
• CPC Class Codes: H01L 21/68735 characterised by edge profile or support profile
• CPC Class Codes: H01L 21/68757 characterised by a coating or a hardness or a material
• CPC Class Codes: H01L 21/68764 characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
• CPC Class Codes: H01L 21/68771 characterised by supporting more than one semiconductor substrate

Abstract

A susceptor at least a surface thereof being coated with SiC, includes a recess where an wafer is mounted, the recess having an round portion disposed on a lower portion of an outer circumferential portion of the recess, a ring-shaped SiC crystal growth surface portion provided within the round portion in a range of 0.05 mm or more and 0.3 mm or less defined from an outer circumference vertical portion of the recess and a contact portion, where the susceptor contacts with the wafer on the recess, having a surface roughness Ra in a range of 0.5 μm or more and 3 μm or less.

Claims

1. A susceptor for use in growing semiconductor wafers, comprising:

a base which comprises

at least one surface, comprising a recess formed in the coated surface for mounting a wafer the recess comprising a generally flat floor region defining a contact portion for the wafer, an outer circumferential vertical portion, and a rounded transitional portion providing a transition between a lower portion of the outer circumferential vertical portion of the recess and the generally flat floor region of the recess;

a layer of SiC coating the surface and the recess;

a second ring-shaped SiC crystal growth surface portion provided within the rounded transitional portion located at a distance within a range of 0.05 mm to 0.3 mm less defined from the outer circumference vertical portion of the recess and

wherein a surface roughness Ra in the contact portion, where the susceptor contacts the wafer is within on the recess, having a surface roughness Ra in a range of 0.5 μ

m 3 μ

m less.

2. The susceptor according to claim 1, wherein an outer circumference planar portion extending from the outer circumferential vertical portion of the recess and at least partially or forming a surface of the susceptor has an irregularly shaped surface having an arithmetic average roughness Ra in a range of 0.05 μ

m to 0.5 μ

m.

3. The susceptor according to claim 2, comprising five recesses, wherein the outer circumference planar portion occupies 70% or more of the surface of the susceptor excluding the recesses.

4. The susceptor according to claim 2, comprising one recess, wherein the outer circumference planar portion covers the entire surface of the susceptor excluding the recesses.

5. The susceptor according to claim 1, wherein the second ring-shaped SiC crystal growth layer comprises a non-polished surface portion.