Method and system for selectively etching a dielectric material relative to silicon

• US 7,393,788 B2
• Filed: 02/10/2006
• Issued: 07/01/2008
• Est. Priority Date: 02/10/2006
• Status: Expired due to Fees

• Current Assignee: Julie A. Cook
• Original Assignee: Julie A. Cook
• Inventors: Cook, Julie A.
• Primary Examiner(s): Deo; Duy-Vu
• Assistant Examiner(s): ANGADI, MAKI A
• Application Number:
  US11/350,765
• Publication Number:
  US 20070190792A1
• Time in Patent Office: 872 Days
• Field of Search: 438/689, 156/345.48, 216/67
• US Class Current: 438/689
• CPC Class Codes: H01L 21/31116 by dry-etching

Abstract

A method and system for selectively and uniformly etching a dielectric layer with respect to silicon and polysilicon in a dry plasma etching system are described. The etch chemistry comprises the use of fluorohydrocarbons, such as CH₂F₂ and CHF₃. High etch selectivity and acceptable uniformity can be achieved by selecting a process condition, including the flow rate of CH₂F₂ and the power coupled to the dry plasma etching system, such that a proper balance of active etching radicals and polymer forming radicals are formed within the etching plasma.

Claims

1. A method of reducing a recess in a spacer etch process, comprising:

disposing a silicon substrate having a spacer dielectric layer overlying a polysilicon feature and a single-crystal-silicon surface on a substrate holder in a dry plasma etching system;

selecting a process condition to have an etch selectivity between said spacer dielectric layer and said single-crystal-silicon surface of greater than or equal to approximately 5-to-1, comprising;

setting a pressure in said dry plasma etching system;

introducing a process gas comprising a first flow rate of a noble gas, a second flow rate of CHF₃, and a third flow rate of CH₂F₂; and

setting a power to be coupled to an electrode in said dry plasma etching system to form plasma from said process gas;

applying said process condition to said dry plasma etching system; and

exposing said substrate to said process condition to etch said spacer dielectric layer down to the single-crystal-silicon surface while minimizing a recess formed in said single-crystal-silicon surface.

2. The method of claim 1, wherein said disposing said silicon substrate in said dry plasma etching system comprises disposing a silicon substrate having a silicon dioxide (SiO₂) layer overlying a polysilicon feature.

3. The method of claim 2, wherein said selecting said process condition comprises selecting a process condition to achieve an etch selectivity between said spacer dielectric layer and said silicon substrate greater than approximately 7-to-1.

4. The method of claim 2, wherein said setting said pressure comprises setting a pressure ranging from approximately 5 mtorr to approximately 1000 mtorr.

5. The method of claim 2, wherein said setting said pressure comprises setting a pressure ranging from approximately 40 mtorr to approximately 100 mtorr.

6. The method of claim 2, wherein said setting said first flow rate comprises setting a flow rate of argon ranging from approximately 0 sccm to approximately 500 sccm.

7. The method of claim 2, wherein said setting said second flow rate comprises setting a flow rate of CHF₃ ranging from approximately 1 sccm to approximately 1000 sccm.

8. The method of claim 2, wherein said setting said second flow rate comprises setting a flow rate of CHF₃ ranging from approximately 20 sccm to approximately 50 sccm.

9. The method of claim 2, wherein said setting said second flow rate comprises setting a flow rate of CH₂F₂ ranging from approximately 1 sccm to approximately 1000 sccm.

10. The method of claim 2, wherein said setting said second flow rate comprises setting a flow rate of CH₂F₂ ranging from approximately 2 sccm to approximately 6 sccm.

11. The method of claim 2, wherein said setting said power comprises setting a radio frequency (RF) power to be coupled to an upper electrode, opposing said substrate on said substrate holder, at a first frequency.

12. The method of claim 11, wherein said setting said RF power to said upper electrode comprises setting a power ranging from approximately 0 W to approximately 2000 W.

13. The method of claim 11, wherein said setting said RF power to said upper electrode comprises setting a power ranging from approximately 100 W to approximately 1000 W.

14. The method of claim 2, wherein said setting said power comprises setting a first radio frequency (RF) power to be coupled to an upper electrode, opposing said substrate on said substrate holder, at a first RF frequency, and setting a second RF power to be coupled to said substrate holder at a second RF frequency.

15. The method of claim 14, wherein said setting said first RF power comprises setting a power ranging from approximately 100 W to approximately 1000 W, and said setting said second RF power comprises setting a power ranging from approximately 50 W to approximately 950 W.

16. A method of uniformly etching silicon oxide relative to at least one of single-crystal-silicon or polysilicon on a substrate placed in a dry plasma etching system, comprising:

placing said substrate having said silicon oxide (SiO_x) film overlying said at least one of single-crystal-silicon or polysilicon on a substrate holder in said dry plasma etching system;

introducing a reactive process gas to a process space in said dry plasma etching system, said reactive process gas comprising CH₂F₂ and CHF₃;

applying a first radio frequency (RF) signal to an electrode in said dry plasma etching system, wherein said first RF signal comprises a frequency greater than 20 MHz;

selecting a ratio of a flow rate of said CH₂F₂ to a RF power coupled to said electrode that is substantially equal to or less than a value of 0.0071 sccm per Watt; and

etching said silicon oxide film down to said at least one of single-crystal-silicon or polysilicon while minimizing etching of the at least one of single-crystal-silicon or polysilicon.

17. The method of claim 16, further comprising:

applying a second RF signal to said substrate holder, wherein said second RF signal comprises a frequency less than 20 MHz.

18. The method of claim 16, further comprising:

introducing a Noble gas to said process space in said plasma processing system.

19. The method of claim 16, wherein said electrode comprises an upper electrode opposing said substrate on said substrate holder.

20. The method of claim 16, wherein said electrode comprises said substrate holder.

21. The method of claim 16, further comprising:

introducing an oxygen containing gas, wherein said oxygen containing gas comprises oxygen (O₂), CO, or CO₂, or any combination thereof.

22. The method of claim 16, wherein said silicon oxide film or saidfilm overlie a polysilicon feature.comprises a polysilicon gate for a transistor.

23. The method of claim 22, wherein said polysilicon feature comprises a polysilicon gate, and said silicon oxide layer comprises an insulation spacer for said polysilicon gate.