Methods and apparatus for implementing a wideband digital beamforming network

• US 7,394,424 B1
• Filed: 11/04/2005
• Issued: 07/01/2008
• Est. Priority Date: 11/04/2005
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Smith, Keith C., Jelinek, Carl O., Kaufman, Steven L., Fairfield, David J., Gallagher, Fred
• Primary Examiner(s): Issing; Gregory C
• Application Number:
  US11/267,802
• Time in Patent Office: 970 Days
• Field of Search: 342/375
• US Class Current: 342/375
• CPC Class Codes: H01Q 3/26 varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture H01Q3/12, H01Q3/22, H01Q3/24 take precedence
• CPC Class Codes: H01Q 3/2682 Time delay steered arrays

Abstract

The present invention concerns methods and apparatus for implementing a true-time-delay wideband digital beamformer. In true-time-delay wideband digital beamformers of the present invention, improved control over beam properties formed by the combination of the beamformer and a multi-element antenna coupled to the beamformer is achieved through finer control of delays imparted to data signals. In beamformers of the present invention, data is delayed using a coarse control that provides a delay in whole increments of a clock cycle of a digital clock reference and a fine control that provides a delay corresponding to a fraction of a whole clock cycle of the digital clock reference. In the true time delay method of the present invention, transmission and reception across a wide frequency band is accommodated. In the true time delay method of the present invention, multiple simultaneous beams are formed independently, beam-to-beam, across a wide frequency band.

Claims

1. A time delay circuit for imparting a time delay to a data signal associated with an antenna element in a multi-element antenna, the time delay circuit comprising:

a data signal input for accepting the data signal to be delayed by the time delay circuit;

a digital clock reference;

a memory storing beamforming control information, wherein the beamforming control information determines physical characteristics of a beam to be formed by the multi-element antenna;

a delay control coupled to the memory, where the delay control calculates the time delay to be applied to the data signal in dependence on the beamforming control information, wherein the time delay calculated by the delay control comprises a coarse delay control component expressed in terms of a number of whole clock cycles of the digital clock reference and a fine delay control component expressed in terms of a portion of a whole clock cycle of the digital clock reference, the delay control further comprising a coarse delay control signal output for conveying a coarse delay control signal corresponding to the coarse delay control component and a fine delay control signal output for conveying a fine delay control signal corresponding to the fine delay control component;

a tap delay line coupled to the data signal input and the coarse delay control signal output of the delay control, the tap delay line for imparting a coarse delay to the data signal by delaying the data signal in dependence on the coarse delay control signal, the tap delay line having an output for conveying the data signal after the data signal has been delayed by the coarse delay;

a programmable digital delay line coupled to the fine delay control signal output of the delay control and to the digital clock reference, the programmable digital delay line generating a digital-to-analog converter clock delay signal in dependence on the fine delay control signal, the programmable digital delay line having an output; and

a digital-to-analog converter coupled to the output of the tap delay line and the output of the programmable digital delay line for performing a digital-to-analog conversion on the data signal, wherein during the digital-to-analog conversion the data signal is further delayed by a fine delay corresponding to a portion of a whole clock cycle of the digital clock reference in dependence on the digital-to-analog clock converter delay signal, the digital-to-analog converter having an output for conveying the data signal to which has been imparted the coarse delay and the fine delay.

2. The time delay circuit of claim 1 further comprising:

a filter coupled to the output of the digital-to-analog converter for filtering the data signal, the filter having an output.

3. The time delay circuit of claim 2 wherein the filter is a band-pass filter.

4. The time delay circuit of claim 2 further comprising:

an amplifier coupled to the output of the filter for amplifying the data signal.

5. The time delay circuit of claim 1 wherein the data signal corresponds to a signal to be emitted by the antenna element when the data signal, after having been delayed by the coarse and fine delay, is applied to the antenna element.

6. The time delay circuit of claim 1 wherein the beamforming control information determines a shape of the beam.

7. The timed delay circuit of claim 1 wherein the beamforming control information determines a direction of the beam.

8. A time delay circuit for imparting a time delay to a signal associated with an antenna element in a multi-element antenna, the time-delay circuit comprising:

a signal input for accepting the signal to be delayed by the time delay circuit;

digital clock reference means for providing a digital clock reference signal;

memory means for storing beamforming control information, wherein the beamforming control information determines physical characteristics of a beam formed by the multi-element antenna;

delay control means coupled to the memory means for calculating the time delay to be applied to the signal in dependence on the beamforming control information, wherein the time delay calculated by the delay control means comprises a coarse delay control component expressed in terms of a number of whole clock cycles of the digital clock reference means and a fine delay control component expressed in terms of a portion of a whole clock cycle of the digital clock reference means, the delay control means further comprising;

coarse delay signal output means for conveying a coarse delay control signal corresponding to the coarse delay control component; and

fine delay signal output means for conveying a fine delay control signal corresponding to the fine delay control component; and

delay application means coupled to the signal input for applying the time delay calculated by the delay control means to the signal, the delay application means further comprising;

coarse delay means coupled to the coarse delay signal output means of the delay control means for imparting a coarse delay to the signal in dependence on the coarse delay control signal; and

fine delay means coupled to the fine delay signal output means of the delay control means for imparting a fine delay to the signal in dependence on the fine delay control signal.

9. The time delay circuit of claim 8 where the multi-element antenna operates in a transmitting mode, and wherein the signal delayed by the coarse delay and fine delay will be emitted by the antenna element when the signal is applied to the antenna element.

10. The time delay circuit of claim 8 wherein the signal received by the time delay circuit at the signal input is generated by the antenna element when the multi-element antenna is operating in a receiving mode.

11. The time delay circuit of claim 8 where the coarse delay means comprises a tap delay line.

12. The time delay circuit of claim 8 wherein the fine delay means comprises, at least in part, a programmable digital delay line.

13. The time delay circuit of claim 12 wherein the fine delay means further comprises at least one of a digital-to-analog converter and an analog-to-digital converter.

14. The time delay circuit of claim 8 wherein the beamforming control information determines a shape of the beam.

15. The time delay circuit of claim 8 wherein the beamforming control information determines a direction of the beam.

16. A beamforming network for imparting time delays to a plurality of signals, where each signal is associated with a particular antenna element of a multi-element antenna, wherein the beamforming network further comprises:

a digital clock reference;

a memory storing beamforming control information, wherein the beamforming control information determines physical characteristics of a beam formed by the combination of the beamforming network and the multi-element antenna;

a delay control coupled to the memory, where the delay control calculates the time delay to be applied to each of the plurality of signals in dependence on the beamforming control information, wherein the time delay calculated for each of the signals comprises a coarse delay control component expressed in terms of a number of whole clock cycles of the digital clock reference and a fine delay control component expressed in terms of a portion of a whole clock cycle of the digital clock reference, the delay control having a coarse delay control signal output for conveying coarse delay control signals corresponding to the coarse delay control components calculated for each of the signals and a fine delay control signal output for conveying fine delay control signals corresponding to the fine delay control components calculated for each of the signals;

a plurality of time delay circuits, wherein each of the time delay circuits is associated with a particular signal and is coupled to a particular antenna element associated with the particular signal, each of the plurality of time delay circuits comprising;

an input port for receiving a particular signal; and

delay application means coupled to the input port for imparting the time delay calculated for the particular signal by the delay control, the delay application means further comprising;

coarse delay means coupled to the coarse delay control signal output of the delay control, the coarse delay means imparting a coarse delay to the particular signal in dependence on the coarse delay control signal generated by the delay control for the particular signal, and

fine delay means coupled to the fine delay control signal output of the delay control, the fine delay means imparting a fine delay to the particular signal in dependence on the fine delay control signal generated by the delay control for the particular signal.

17. The beamforming network of claim 16, wherein the beamforming network and multi-element antenna operate in a transmitting mode.

18. The beamforming network of claim 16, wherein the beamforming network and multi-element antenna operate in a receiving mode.

19. The beamforming network of claim 16, wherein the beamforming control information determines a shape of the beam.

20. The beamforming network of claim 16, wherein the beamforming control information determines a direction of the beam.

21. A beamforming system capable of generating a plurality of separate beams in combination with a multi-element antenna, the beamforming system comprising:

a plurality of beamforming networks, where each of the beamforming networks is associated with a particular beam of the plurality of separate beams to be formed by the beamforming system and the multi-element antenna, and where each of the beamforming networks is operable to impart time delays to a plurality of signals, where each signal is associated with a particular antenna element of the multi-element antenna, and where each of the beamforming networks further comprises;

a digital clock reference;

a memory storing beamforming control information, wherein the beamforming control information determines physical characteristics of a particular beam of the plurality of separate beams to be formed by the beamforming network and the multi-element antenna;

a delay control coupled to the memory, where the delay control calculates the time delay to be applied to each of the plurality of signals in dependence on the beamforming control information, wherein the time delay calculated for each of the signals comprises a coarse delay component expressed in terms of a number of whole clock cycles of the digital clock reference and a fine delay control component expressed in terms of a portion of a whole clock cycle of the digital clock reference, the delay control having a coarse delay control signal output for conveying coarse delay control signals corresponding to the coarse delay control components calculated for each of the signals and a fine delay control signal output for conveying fine delay control signals corresponding to the fine delay control components calculated for each of the signals;

a plurality of time delay circuits, wherein each of the time delay circuits is associated with a particular signal and is coupled to a particular antenna element associated with the particular signal, each of the plurality of time delay circuits comprising;

an input port for receiving a particular signal; and

delay application means coupled to the input port for imparting the time delay calculated for the particular signal by the delay control, the delay application means further comprising;

coarse delay means coupled to the coarse delay control signal output of the delay control, the coarse delay means imparting a coarse delay to the particular signal in dependence on the coarse delay control signal generated by the delay control for the particular signal; and

fine delay means coupled to the fine delay control signal output of the delay control, the fine delay means imparting a fine delay to the particular signal in dependence on the fine delay control signal generated by the delay control for the particular signal.

22. The beamforming system of claim 21 wherein the beamforming system and multi-element antenna operate in a transmitting mode.

23. The beamforming system of claim 21 wherein the beamforming system and multi-element antenna operate in a receiving mode.

24. The beamforming system of claim 21 wherein the beamforming system is operable to form multiple simultaneous beams in combination with the multi-element antenna.

25. The beamforming system of claim 21 wherein the coarse delay means of each of the time delay circuits comprises a tap delay line.

26. The beamforming system of claim 21 wherein the fine delay means of each of the time delay circuits comprises, at least in part, a programmable digital delay line.

27. The beamforming system of claim 26 wherein the fine delay means further comprises at least one of a digital-to-analog converter and an analog-to-digital converter.

28. The beamforming system of claim 21 wherein the beamforming control information associated with a particular beam determines a shape of the beam.

29. The beamforming system of claim 21 wherein the beamforming control information associated with a particular beam determines a direction of the beam.

30. A memory medium storing a computer program executable by a digital processor incorporated in a beamforming circuit, whereby when the digital processor executes the computer program operations are performed, the operations comprising:

receiving a command to calculate a time delay to be applied to a signal associated with a particular antenna element coupled to the beamforming circuit, wherein the particular antenna element is part of a multi-element antenna;

accessing beamforming control information, wherein the beamforming control information determines physical characteristics of a beam to be formed by the multi-element antenna;

calculating a coarse delay in dependence on the beamforming control information, wherein the coarse delay corresponds to a number of whole clock cycles of a digital clock reference the signal is to be delayed;

generating a coarse delay control signal reflecting the coarse delay calculated for the signal;

providing the coarse delay control signal to coarse delay means operable to delay the signal by the coarse delay indicated in the coarse delay control signal;

delaying the signal associated with the particular antenna element by the coarse delay indicated in the coarse delay control signal;

calculating a fine delay in dependence on the beamforming control information, wherein the fine delay corresponds to a portion of a whole clock cycle of the digital clock reference;

generating a fine delay control signal reflecting the fine delay calculated for the signal;

providing the fine delay control signal to fine delay means operable to delay the signal by the fine delay indicated in the fine delay control signal;

delaying the signal associated with the particular antenna element by the fine delay indicated in the fine delay control signal; and

whereby the combination of the delay operations performed by the coarse delay means and the fine delay means in dependence on the coarse delay control signal and the fine delay control signal delay the signal associated with the particular antenna element by the sum of the number of whole clock cycles of the digital clock reference indicated in the coarse delay control signal and the portion of a whole clock cycle of the digital clock reference indicated in the fine delay control signal.

31. The memory medium of claim 30 wherein the operations are performed when the multi-element antenna is operating in a transmitting mode.

32. The memory medium of claim 30 wherein the operations are performed when the multi-element antenna is operating in a receiving mode.

33. The memory medium of claim 30, wherein the beamforming control information determines a direction of the beam formed by the multi-element antenna.

34. The memory medium of claim 30, wherein the beamforming control information determines a shape of the beam formed by the multi-element antenna.

35. The memory medium of claim 30, wherein the coarse delay means comprises a tap delay line.

36. The memory medium of claim 30, wherein the fine delay means comprises a programmable digital delay line.

37. A memory medium storing a computer program executable by at least one digital processor incorporated in a beamforming network, whereby when the at least one digital processor executes the computer program operations are performed, the operations comprising:

for each signal associated with a particular antenna element of a multi-element antenna coupled to the beamforming network,

receiving a command to calculate a time delay to be applied to the signal associated with the particular antenna element;

accessing beamforming control information, wherein the beamforming control information determines physical characteristics of a beam to be formed by the multi-element antenna;

calculating a coarse delay in dependence on the beamforming control information, wherein the coarse delay corresponds to a number of whole clock cycles of a digital clock reference the signal is to be delayed;

generating a coarse delay control signal reflecting the coarse delay calculated for the signal;

providing the coarse delay control signal to coarse delay means operable to delay the signal by the coarse delay indicated in the coarse delay control signal;

delaying the signal associated with the particular antenna element by the coarse delay indicated in the coarse delay control signal;

calculating a fine delay in dependence on the beamforming control information, wherein the fine delay corresponds to a portion of a whole clock cycle of the digital clock reference;

generating a fine delay control signal reflecting the fine delay calculated for the signal;

providing the fine delay control signal to fine delay means operable to delay the signal by the fine delay indicated in the fine delay control signal;

delaying the signal associated with the particular antenna element by the fine delay indicated in the fine delay control signal; and

whereby the combination of the delay operations performed by the coarse delay means and the fine delay means in dependence on the coarse delay control signal and the fine delay control signal delay the signal associated with the particular antenna element by the sum of the number of whole clock cycles of the digital clock reference indicated in the coarse delay control signal and the portion of a whole clock cycle of the digital clock reference indicated in the fine delay control signal.

38. The memory medium of claim 37 where the multi-element antenna comprises at least one linear array of antenna elements, wherein beamwidth control of the beam formed by the multi-element antenna is achieved by applying non-linear progressive delays to the signals associated with particular antenna elements.

39. The memory medium of claim 37 wherein the multi-element antenna comprises at least one linear array of antenna elements, wherein beamwidth control of the beam formed by the multi-element antenna is further achieved by selectively controlling gains applied to signals coupled to antenna elements at ends of the linear array.

40. The memory medium of claim 37 wherein the operations are performed when the multi-element antenna is operating in the transmitting mode.

41. The memory medium of claim 37 wherein the operations are performed when the multi-element antenna is operating in the receiving mode.

42. The memory medium of claim 37, wherein the beamforming control information determines the direction of the beam.

43. The memory medium of claim 37, wherein the beamforming control information determines the shape of the beam.