System for synchronizing circuitry in an access network
First Claim
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1. A synchronization circuit, comprising:
- a local timestamp counter configured to generate a local timestamp value;
a processing circuit to receive externally generated synchronization pulses and to receive a predicted master time stamp value associated with a future one of the externally generated synchronization pulses, wherein the processing circuit receives the predicted master timestamp value asynchronously in Internet Protocol (IP) packets received over an IP connection,the processing circuit to identify the local timestamp value and synchronize the local timestamp value upon receipt of the future one of the externally generated synchronization pulses; and
one or more line cards in a same Cable Modem Termination System (CMTS) chassis that each have local timestamp counters that is adjusted according to the received predicted master timestamp value and local timestamp value at the future received synchronization pulse and wherein the processing circuit identifies an error condition according to a number of times the local timestamp counter is synchronized with the received predicted master timestamp value.
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Abstract
A master Timestamp Synchronization Circuit (TSC) in a Cable Modem Termination System (CMTS) estimates a master timestamp value for an upcoming time reference. The master TSC sends the master timestamp value asynchronously over an Internet Protocol (IP) network to slave TSCs in other CMTSs. The slave TSC compares a local timestamp value with the master timestamp value when the upcoming time reference occurs. If the local timestamp value does not match the master timestamp value, the slave TSC is resynchronized using the master timestamp value.
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Citations
16 Claims
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1. A synchronization circuit, comprising:
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a local timestamp counter configured to generate a local timestamp value; a processing circuit to receive externally generated synchronization pulses and to receive a predicted master time stamp value associated with a future one of the externally generated synchronization pulses, wherein the processing circuit receives the predicted master timestamp value asynchronously in Internet Protocol (IP) packets received over an IP connection, the processing circuit to identify the local timestamp value and synchronize the local timestamp value upon receipt of the future one of the externally generated synchronization pulses; and one or more line cards in a same Cable Modem Termination System (CMTS) chassis that each have local timestamp counters that is adjusted according to the received predicted master timestamp value and local timestamp value at the future received synchronization pulse and wherein the processing circuit identifies an error condition according to a number of times the local timestamp counter is synchronized with the received predicted master timestamp value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 15, 16)
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8. A synchronization system, comprising:
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a first Cable Modem Termination Systems (CMTS) having a first chassis containing a master synchronization circuit; a second CMTS having a second separate chassis containing a slave synchronization circuit; a master synchronization circuit including; a master counter to generate respective master timestamp values varying with cycling of a clocking signal; a processing circuit to determine, for a given count of consecutive ones of synchronization pulses cycling less often than the clocking signal, the corresponding difference between the master timestamp values and to calculate a future master timestamp value by adding the corresponding difference to an initial one of the master timestamp values corresponding to an initial one of the synchronizing pulses and the master synchronization circuit being configured to forward the calculated future master timestamp value to the slave synchronization circuit over a wide area network for synchronizing the value of a slave counter in the slave synchronization circuit with the future master timestamp value at a future synchronization pulse generated independently of operations by the master counter and slave counter and corresponding to a given count of consecutive ones of synchronization pulses following the initial one of the synchronization pulses; and one or more line cards in at least one of the first and second CMTS that include one or more slave circuits each synchronized with the future master timestamp value at the future synchronization pulse when the difference between an actual master timestamp value and the future master timestamp value is within the predetermined range. - View Dependent Claims (9, 10, 11)
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12. A method for synchronizing circuitry, comprising:
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identifying a period between synchronization pulses; extrapolating a time for a future synchronization pulse by adding one of the synchronization pulses to the period multiplied by a predetermined amount, extrapolating a master timestamp value by adding a master timestamp value for the one of the synchronization pulses and the predetermined amount multiplied by a difference between two previous master timestamp values, receiving the extrapolated master timestamp value for an upcoming time reference in an Internet Protocol (IP) packet over an asynchronous Internet connection; generating a local timestamp value; comparing the local timestamp value at the upcoming time reference with the extrapolated master timestamp value; synchronizing the local timestamp value with the extrapolated master timestamp value according to the comparison; and receiving the extrapolated master timestamp value from a first cable modem termination system (CMTS) and using the extrapolated master timestamp value to synchronize a timing circuit in a second CMTS. - View Dependent Claims (13, 14)
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Specification