Semiconductor device having shallow trenches and method for manufacturing the same

• US 7,397,082 B2
• Filed: 08/25/2004
• Issued: 07/08/2008
• Est. Priority Date: 04/02/2001
• Status: Expired due to Fees

• Current Assignee: Shindengen Electric Manufacturing Company Limited
• Original Assignee: Shindengen Electric Manufacturing Company Limited
• Inventors: Watanabe, Yuji, Takemori, Toshiyuki, Itoi, Masato
• Primary Examiner(s): Doan; Theresa T
• Application Number:
  US10/924,808
• Publication Number:
  US 20050017294A1
• Time in Patent Office: 1,413 Days
• Field of Search: 257328-331, 257/333, 257/341
• US Class Current: 257/329
• CPC Class Codes: H01L 29/4232 with insulated gate
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The capacitance between the gate electrode film and the drain layer of semiconductor device is reduced while keeping the resistance low, with the breakdown voltage of the gate insulating film also being maintained at a sufficient level. A trench 10 is formed with the bottom of the trench at a comparatively shallow position in an N-epitaxial layer 18. The thickness of a bottom surface part 16 of a gate electrode film 11 is formed so as to be thicker than other parts of the gate electrode film 11. Also, when a P type body layer 19 is formed, an interface between the P type body layer 19 and an N-epitaxial layer 18 is located at a deeper position than a bottom end of the gate electrode film 11.

Claims

1. A semiconductor device, comprising:

a substrate;

an epitaxial layer of a first conductivity type formed on top of said substrate;

a body layer of a second conductivity type opposite to the first conductivity type formed on top of said epitaxial layer;

a trench formed in the body layer, wherein said trench reaches the epitaxial layer;

a source region of the first conductivity type formed on said body layer, with at least part of the source region being exposed to inner surfaces of the trench;

a gate insulating film that is formed on the inner surfaces of the trench;

a gate electrode that is formed within said trench and electrically isolated from said epitaxial layer, said body layer and said source region by the gate insulating film; and

a source electrode that is insulated from the gate electrode and connected to the source region;

wherein

a lowermost end face of said gate electrode is spaced from a first interface between the body layer and the epitaxial layer and a second interface between the epitaxial layer and the substrate by first and second distances, respectively, said distances being measured in a thickness direction of said trench, and the first distance is smaller than the second distance; and

in a region above the first interface, said gate insulating film has a thickness that increases towards the first interface.

2. The semiconductor device according to claim 1, wherein a width of the gate electrode, as measured in a direction perpendicular to a thickness direction of said trench, increases towards the source region.

3. The semiconductor device according to claim 2, wherein said gate electrode has an upper part and a lower part that defines the lowermost portion of said gate electrode, a connection between said upper and lower parts being located between the source region and the first interface between the body layer and the epitaxial layer.

4. The semiconductor device according to claim 2, wherein the gate electrode has a curved side surface facing the gate insulating film.