Variable gain amplifier

• US 7,397,302 B2
• Filed: 04/13/2007
• Issued: 07/08/2008
• Est. Priority Date: 04/03/2004
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Cordrey-Gale, Matthew R., Mason, James S., Nicholls, Gareth J., Murfet, Philip J., Bardsley, Thomas J.
• Primary Examiner(s): CHOE, HENRY
• Application Number:
  US11/734,864
• Publication Number:
  US 20070194848A1
• Time in Patent Office: 452 Days
• Field of Search: 330/51, 330/124.R, 330/295, 330/84, 330/126, 330/254
• US Class Current: 330/51
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03G 1/0029 using FETs
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated
• CPC Class Codes: H03G 2201/103 being an amplifying element
• CPC Class Codes: H03G 2201/504 by summing selected parallel amplifying paths, i.e. more amplifying/attenuating paths summed together
• CPC Class Codes: H03G 3/001 Digital control of analog signals

Abstract

A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

Claims

1. A method for varying gain of an amplifier array comprising:

enabling a first amplifier stage having an input signal with a first amplitude;

controlling gain of said first amplifier stage to increase said gain up to a maximum for said first amplifier stage;

enabling a second amplifier stage in parallel with said first amplifier stage, said second amplifier stage having an input signal with a second amplitude different from said first amplitude;

controlling gain of said second amplifier stage to increase gain up to a maximum for said second amplifier stage;

wherein the step of controlling gain of said amplified stage includes implementing a control law for amplitude gain versus a control setting characteristic of a gain control; and

summing outputs of said enabled amplifier stages.

2. The method of claim 1, further comprising steering current between source and drain of each of said amplifier stages to support maintenance of a common mode at an output of said array.

3. The method of claim 1, wherein said first amplifier stage has a most attenuated input signal for low gain settings.

4. The method of claim 1, wherein each enabled amplifier stage has a decreasingly attenuated input signal and a final enabled amplifier stage has a full input signal.

5. The method of claim 1, wherein a value of said gain controller is autonomous for each setting and said control law is continuous.

6. The method of claim 1, wherein the step of controlling gain of said amplifier stage includes a step selected from a group consisting of:

optimization of bandwidth of an associated amplifier, source degeneration, and progressive addition and subtraction of elements through a parallel and series combination to change impedance of a network.

7. The method of claim 6, wherein each gain control setting has a specific impedance in the network.

8. The method of claim 1, wherein the step of controlling gain of an amplifier stage includes receiving a digital gain vector and decoding said digital gain vector to obtain an output.

9. The method of claim 8, further comprising filtering said output to minimize disturbance on said output as gain is changed between settings of the gain vector.

10. A method for varying gain of an amplifier away comprising:

enabling a first amplifier stage having an input signal with a first amplitude;

controlling gain of said first amplifier stage to increase said gain up to a maximum for said first amplifier stage;

enabling a second amplifier stage in parallel with said first amplifier stage, said second amplifier stage having an input signal with a second amplitude different from said first amplitude;

controlling gain of said second amplifier stage to increase gain up to a maximum for said second amplifier stage;

wherein the step of controlling gain of said amplified stage includes receiving a digital gain vector and decoding said digital gain vector to obtain an output; and

summing outputs of said enabled amplifier stages.

11. The method of claim 10, further comprising steering current between source and drain of each of said amplifier stages to support maintenance of a common mode at an output of said array.

12. The method of claim 10, wherein said first amplifier stage has a most attenuated input signal for low gain settings.

13. The method of claim 10, wherein each enabled amplifier stage has a decreasingly attenuated input signal and a final enabled amplifier stage has a full input signal.

14. The method of claim 10, wherein the step of controlling gain of an amplifier stage includes implementing a control law for amplitude gain versus a control setting characteristic of a gain control.

15. The method of claim 14, wherein a value of said gain controller is autonomous for each setting and said control law is continuous.

16. The method of claim 10, wherein the step of controlling gain of said amplifier stage includes a step selected from a group consisting of:

optimization of bandwidth of an associated amplifier, source degeneration, and progressive addition and subtraction of elements through a parallel and series combination to change impedance of a network.

17. The method of claim 16, wherein each gain control setting has a specific impedance in the network.

18. The method of claim 10, wherein the step of controlling gain of an amplifier stage includes receiving a digital gain vector and decoding said digital gain vector to obtain an output.

19. The method of claim 18, further comprising filtering said output to minimize disturbance on said output as gain is changed between settings of the gain vector.