Electronic circuit designing method apparatus for designing an electronic circuit, and storage medium for storing an electronic circuit designing method

• US 7,398,497 B2
• Filed: 11/22/2004
• Issued: 07/08/2008
• Est. Priority Date: 07/11/2001
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Kobayashi, Kazumasa, Fujimori, Shogo, Sato, Toshiro
• Primary Examiner(s): Whitmore; Stacy A
• Assistant Examiner(s): ROSSOSHEK, YELENA
• Application Number:
  US10/992,755
• Publication Number:
  US 20050086626A1
• Time in Patent Office: 1,324 Days
• Field of Search: 716/1, 716/2, 716/7, 716/8, 716/10, 716/12, 716/15, 703/503
• US Class Current: 716/112
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.

Claims

1. An electronic circuit designing method for designing an electronic circuit by CAD, comprising the steps of:

(a) automatically generating design constraints with respect to the electronic circuit based on general layout and wiring information and at least one of user reguirements defined by a user and user resources defined by the user, and setting initial values of the design constraints;

(b) making an analysis, using an analyzing tool, by changing parameter values of the generated design constraints in a predetermined range that is input, so as to enlarge or reduce a search range of a solution space of the initial values of the design constraints satisfying user requirements, said analyzing tool carrying out at least one of a signal integrity analysis, a radio wave analysis, a thermal analysis, and a cost analysis; and

(c) automatically enlarging or reducing the search range of the solution space of the initial values of the design constraints by automatically changing the parameter values of the generated design constraints depending on said analysis, based on device layout constraint definitions including at least one of definitions related to a device layout prohibited region and a movable region of each device, so as to generate the design constraints in a range where circuit layout and wiring are possible by taking into consideration the device layout prohibited region and the movable region of each device.

2. The electronic circuit designing method as claimed in claim 1, further comprising the step of:

(d) regenerating the design constraints by automatically enlarging or reducing the design constraints again, based on a device layout constraint definition which is added after generation of the design constraints.

3. The electronic circuit designing method as claimed in claim 1, wherein said step (a) automatically generates the initial values of the design constraints with respect to the electronic circuit based on input general layout and wiring information related to devices and wiring included in the electronic circuit.

4. The electronic circuit designing method as claimed in claim 3, wherein said step (a) automatically generates the initial values of the design constraints with respect to the electronic circuit based further on at least one of user requirements, user resources, knowledge know-how database and design constraint condition database.

5. An electronic circuit designing apparatus for designing an electronic circuit by CAD, comprising:

means for automatically generating design constraints with respect to the electronic circuit based on general layout and wiring information and at least one of user reguirements defined by a user and user resources defined by the user, and setting initial values of the design constraints;

means for making an analysis, using an analyzing tool, by changing parameter values of the generated design constraints in a predetermined range that is input, so as to enlarge or reduce a search range of a solution space of the initial values of the design constraints satisfying user requirements, said analyzing tool carrying out at least one of a signal integrity analysis, a radio wave analysis, a thermal analysis, and a cost analysis; and

automatically enlarging or reducing the search range of the solution space of the initial values of the design constraints by automatically changing the parameter values of the generated design constraints depending on said analysis, based on device layout constraint definitions including at least one of definitions related to a device layout prohibited region and a movable region of each device, so as to generate the design constraints in a range where circuit layout and wiring are possible by taking into consideration the device layout prohibited region and the movable region of each device.

6. The electronic circuit designing apparatus as claimed in claim 5, further comprising:

means for regenerating the design constraints by automatically enlarging or reducing the design constraints again, based on a device layout constraint definition which is added after generation of the design constraints.

7. The electronic circuit designing apparatus as claimed in claim 5, wherein said means for obtaining automatically generates the initial values of the design constraints with respect to the electronic circuit based on the input general layout and wiring information.

8. The electronic circuit designing apparatus as claimed in claim 7, wherein said means for obtaining automatically generates the initial values of the design constraints with respect to the electronic circuit based further on at least one of user requirements, user resources, knowledge know-how database and design constraint condition database.

9. A computer-readable storage medium which stores a program for causing a computer to design an electronic circuit by CAD, said program comprising:

a first procedure causing the computer to automatically generate design constraints with respect to the electronic circuit based on general layout and wiring information and at least one of user reguirements defined by a user and user resources defined by the user, and setting initial values of the design constraints;

a second procedure causing the computer to make an analysis, using an analyzing tool, by changing parameter values of the generated design constraints in a predetermined range that is input, so as to enlarge or reduce a search range of a solution space of the initial values of the design constraints satisfying user requirements, said analyzing tool carrying out at least one of a signal integrity analysis, a radio wave analysis, a thermal analysis, and a cost analysis; and

a third procedure causing the computer to automatically enlarge or reduce the search range of the solution space of the initial values of the design constraints by automatically changing the parameter values of the generated design constraints depending on said analysis, based on device layout constraint definitions including at least one of definitions related to a device layout prohibited region and a movable region of each device, so as to generate the design constraints in a range where circuit layout and wiring are possible by taking into consideration the device layout prohibited region and the movable region of each device.

10. The computer-readable storage medium as claimed in claim 9, said program further comprising:

a procedure causing the computer to regenerate the design constraints by automatically enlarging or reducing the design constraints again, based on a device layout constraint definition which is added after generation of the design constraints.

11. The computer-readable storage medium as claimed in claim 9, wherein said first procedure causes the computer to automatically generate the initial values of the design constraints with respect to the electronic circuit based on the input general layout and wiring information.

12. The computer-readable storage medium as claimed in claim 11, wherein said first procedure causes the computer to automatically generate the initial values of the design constraints with respect to the electronic circuit based further on at least one of user requirements, user resources, knowledge know-how database and design constraint condition database.