Hermetic cap layers formed on low-κ films by plasma enhanced chemical vapor deposition

• US 7,399,364 B2
• Filed: 06/12/2006
• Issued: 07/15/2008
• Est. Priority Date: 06/21/2004
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Kim, Bok Hoen, Yim, Kang Sub, Nguyen, Vu Ngoc Tran
• Primary Examiner(s): Lund; Jeffrie R
• Application Number:
  US11/423,586
• Publication Number:
  US 20060219174A1
• Time in Patent Office: 764 Days
• Field of Search: 118/715, 118/723.E, 118/696, 118/697, 700/121
• US Class Current: 118/697
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02315 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/0276 using an anti-reflective coating anti-reflective coating for lithography in general G03F7/09
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31633 Deposition of carbon doped silicon oxide, e.g. SiOC
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners

Abstract

A method of forming a cap layer over a dielecrtic layer on a substrate including forming a plasma from a process gas including oxygen and tetraethoxysilane, and depositing the cap layer on the dielectric layer, where the cap layer comprises a thickness of about 600 Å or less, and a compressive stress of about 200 MPa or more. Also, a method of forming a cap layer over a dielectric layer on a substrate including forming a process gas by flowing together about 200 mgm to about 8000 mgm of tetraethoxysilane, about 2000 to about 20000 sccm of oxygen (O₂), and about 2000 sccm to about 20000 sccm of carrier gas, generating a plasma from the process gas, where one or more RF generators supply about 50 watts to about 100 watts of low frequency RF power to the plasma, and about 100 watts to about 600 watts of high frequency RF power to the plasma, and depositing the cap layer on the dielectric layer.

Claims

1. A system for forming a cap layer over a dielectric layer on a substrate, the system comprising:

a housing configured to form a processing chamber;

a gas distribution system to flow about 200 mgm to about 8000 mgm of a silicon containing precursor, about 2000 to about 20000 sccm of oxygen (O₂), and about 2000 sccm to about 20000 sccm of carrier gas through a gas distribution faceplate and into the processing chamber;

a plasma generation system configured to form a plasma within said processing chamber, wherein said plasma generation system comprises one or more RF generators that supply about 50 watts to about 100 watts of low frequency RF power to the plasma, and about 100 watts to about 600 watts of high frequency RF power to the plasma;

a substrate holder configured to hold the substrate about 350 to about 450 mils from the gas distribution faceplate within the processing chamber; and

a system controller to control the gas distribution system and the plasma generation system, wherein the controller executes system control software to;

(a) form a first plasma from the silicon containing precursor to pretreat a deposition surface of a dielectric layer, and wherein the pretreatment deposits silicon in at least one pore on the deposition surface; and

(b) form a second plasma from the oxygen and the silicon containing precursor, wherein the second plasma deposits the cap layer on the pretreated dielectric layer, the cap layer having a thickness of about 600 Å

or less, and a compressive stress of about 200 MPa or more.

2. The system of claim 1, wherein the dielectric layer is a low-κ

dielectric layer comprising silicon and carbon.

3. The system of claim 1, wherein the cap layer comprises undoped silicate glass.

4. The system of claim 1, wherein the silicon containing precursor comprises silane, tetraethoxysilane, or octamethylcyclotetrasiloxane.

5. The system of claim 1, wherein the thickness of the cap layer is about 200 Å

to about 600 Å

.

6. The system of claim 1, wherein the cap layer has a compressive stress of about 200 MPa to about 300 MPa.

7. The system of claim 1, the substrate comprises a 200 mm or 300 mm silicon wafer.