Nano structure electrode design

• US 7,402,770 B2
• Filed: 11/09/2005
• Issued: 07/22/2008
• Est. Priority Date: 06/10/2005
• Status: Active Grant

• Current Assignee: Nantero Incorporated
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Bhatt, Hemanshu D., Carter, Richard J., Burke, Peter A., Sun, Sey-Shing
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US11/270,104
• Publication Number:
  US 20060278902A1
• Time in Patent Office: 986 Days
• Field of Search: 200/238, 365/164, 438/128, 438/800, 257/209, 257/798, 977/724
• US Class Current: 200/238
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 13/025 using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
• CPC Class Codes: H10K 10/701 Organic molecular electronic devices
• CPC Class Codes: H10K 85/221 Carbon nanotubes
• CPC Class Codes: Y10S 977/724 Devices having flexible or movable element

Abstract

A microelectronic switch having a substrate layer, an electrically conductive switching layer formed on the substrate layer, an electrically conductive cavity layer formed on the switching layer, an electrically conductive cap layer formed on the cavity layer, the cap layer forming a first electrode and a second electrode that are physically and electrically separated one from another, and which both at least partially overlie the switching layer, and a cavity disposed between the switching layer and the second electrode, where the switching is layer is flexible to make electrical contact with the second electrode by flexing through the cavity upon selective application of an electrical bias.

Claims

1. A microelectronic switch, comprising:

a substrate layer,

an electrically conductive switching layer formed on the substrate layer,

an electrically conductive cavity layer formed on the switching layer,

an electrically conductive cap layer formed on the cavity layer, the cap layer forming a first electrode and a second electrode that are physically and electrically separated one from another, and which both at least partially overlie the switching layer, and

a cavity disposed between the switching layer and the second electrode,

where the switching is layer is flexible to make electrical contact with the second electrode by flexing through the cavity upon selective application of an electrical bias.

2. The microelectronic switch of claim 1, wherein the substrate is formed of silicon.

3. The microelectronic switch of claim 1, wherein the switching layer is formed of carbon nanotubes.

4. The microelectronic switch of claim 1, wherein the cavity layer is formed of at least one of Al, Zn, Cd, In, Sn, Sb, Pb, Bi and their alloys.

5. The microelectronic switch of claim 1, wherein the cavity layer is formed with a tensile stress in the cavity layer.

6. The microelectronic switch of claim 1, wherein the cavity layer is formed with a porosity that is sufficient to absorb a volume of melted material from within the cavity.

7. The microelectronic switch of claim 1, wherein the cavity layer is formed of a material having a lower melting point than the cap layer.

8. The microelectronic switch of claim 1, wherein the second electrode overlaps the switching layer by about one hundred nanometers.

9. An integrated circuit including the microelectronic switch of claim 1.

10. A microelectronic switch, comprising:

an electrically conductive switching layer formed of carbon nanotubes,

an electrically conductive cavity layer formed of at least one of Al, Zn, Cd, In, Sn, Sb, Pb, Bi and their alloys, formed on the switching layer,

an electrically conductive cap layer formed on the cavity layer with a tensile stress, the cap layer forming a first electrode and a second electrode that are physically and electrically separated one from another, and which both at least partially overlie the switching layer, wherein the cap layer is formed of a material having a higher melting point than the cavity layer, and

a cavity disposed between the switching layer and the second electrode, where the cavity layer is formed with a porosity that is sufficient to absorb a volume of melted material from the cavity layer within the cavity, where the second electrode overlaps the switching layer by about one hundred nanometers within the cavity,

where the switching is layer is flexible to make electrical contact with the second electrode by flexing through the cavity upon selective application of an electrical bias.

11. An integrated circuit including the microelectronic switch of claim 10.

12. A method of forming a microelectronic switch, the method comprising the steps of:

forming an electrically conductive switching layer,

forming an electrically conductive cavity layer overlying the switching layer,

forming an electrically conductive cap layer overlying the cavity layer,

forming a first electrode and a second electrode of the cap layer, where the first electrode and the second electrode are physically and electrically separated one from another, and the first electrode and the second electrode both at least partially overlie the switching layer,

forming a passivation layer between and overlying the first electrode and the second electrode, and

forming a cavity between the switching layer and the overlying portion of the second electrode by applying a current between the switching layer and the overlying portion of the second electrode, where the current is sufficient to create a Joule heating effect within the cavity layer between the switching layer and the overlying portion of the second electrode and melt the cavity layer between the switching layer and the overlying portion of the second electrode.

13. The method of claim 12, wherein the switching layer is formed on a silicon substrate.

14. The method of claim 12, wherein the switching layer is formed of carbon nanotubes.

15. The method of claim 12, wherein the cavity layer is formed of at least one of Al, Zn, Cd, In, Sn, Sb, Pb, Bi and their alloys.

16. The method of claim 12, wherein the cavity layer is formed with a tensile stress in the cavity layer.

17. The method of claim 12, wherein the cavity layer is formed with a porosity that is sufficient to absorb the melted cavity layer within the cavity.

18. The method of claim 12, wherein the cavity layer is formed of a material having a lower melting point than the cap layer.

19. The method of claim 12, wherein the second electrode overlaps the switching layer by about one hundred nanometers.

20. An integrated circuit including a microelectronic switch formed according to the method of claim 12.