Adverse condition detector with diagnostics
DC CAFCFirst Claim
1. A method of operating an adverse condition detector including at least an adverse condition detection circuit and a microprocessor contained within a housing, the method comprising the steps of:
- activating an internal clock within the microprocessor upon the initial activation of the adverse condition detector;
operating the microprocessor within the adverse condition detector to monitor for the occurrence of one of a series of monitored events related to the operation of the adverse condition detector;
recording the occurrence of the monitored event and a time stamp within the microprocessor of the adverse condition detector, the time stamp being the value of the internal clock upon the occurrence of the monitored event; and
interrogating the microprocessor to extract the recorded occurrences of the monitored events and the associated time stamps.
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Accused Products
Abstract
An adverse condition detector that records historical data concerning the operation of the detector such that the detector can be interrogated by a technician. The microprocessor of the adverse condition detector monitors for alarm conditions and other important information related to the operation of the detector. Upon identifying an important characteristic of the detector operation, the microprocessor time stamps the information and stores the information within memory of the microprocessor. The detector includes an interface pad that is accessible from the exterior of the detector such that a technician can access the interface pad without removing the detector housing.
76 Citations
19 Claims
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1. A method of operating an adverse condition detector including at least an adverse condition detection circuit and a microprocessor contained within a housing, the method comprising the steps of:
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activating an internal clock within the microprocessor upon the initial activation of the adverse condition detector; operating the microprocessor within the adverse condition detector to monitor for the occurrence of one of a series of monitored events related to the operation of the adverse condition detector; recording the occurrence of the monitored event and a time stamp within the microprocessor of the adverse condition detector, the time stamp being the value of the internal clock upon the occurrence of the monitored event; and interrogating the microprocessor to extract the recorded occurrences of the monitored events and the associated time stamps. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An adverse condition detector comprising:
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an enclosed housing; a microprocessor contained within the housing and including an internal clock; at least a first adverse condition detection circuit contained within the housing and coupled to the microprocessor and operable to detect the presence of an adverse condition; and an interface pad contained within the housing and coupled to the microprocessor such that the microprocessor can receive information through the interface pad and transmit information to an external communication device through the interface pad, wherein the microprocessor is operable to monitor for the occurrence of a monitored event and record both the occurrence of the monitored event detected by the adverse condition detection circuit and a time stamp, wherein the time stamp is the value of the internal clock upon the occurrence of the monitored event. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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Specification