Integrated circuit for code acquisition
First Claim
Patent Images
1. A semiconductor integrated circuit for processing a plurality of received broadcast signals, the broadcast signals being of a type each having a different respective digital code, the semiconductor integrated circuit comprising:
- a digital sampler;
a memory arrangement; and
a plurality of correlators, being arranged to be operable in two modes wherein;
in an acquisition mode;
the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at a first bit rate;
the memory arrangement is adapted to receive the digital bit stream and to output at a second bit rate, being higher than the first bit rate;
the plurality of correlators is adapted to receive the digital bit stream at the second bit rate, and each of the plurality of correlators is adapted to correlate the digital bit stream with a same locally generated version of one of the different digital codes; and
in a track mode;
the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at the first bit rate and to provide the digital bit stream direct to each of the plurality of correlators, each correlator is adapted to correlate the digital bit stream with a different locally generated version of one of the digital codes,wherein the memory arrangement includes two shift registers arranged to alternately receive the digital bit stream at the first bit rate while another of the shift registers circulates at the second bit rate.
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Abstract
A semiconductor integrated circuit for processing a plurality of received broadcast signals, such as GPS signals, is operable in two modes: acquisition and tracking. In an acquisition mode, a memory arrangement comprising two circulating shift registers circulates samples of a received signal for correlation with a locally generated version of a GPS code. In a tracking mode, the sampled signal is provided direct to the correlators. The same correlators are thereby used to increase acquisition speed.
26 Citations
19 Claims
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1. A semiconductor integrated circuit for processing a plurality of received broadcast signals, the broadcast signals being of a type each having a different respective digital code, the semiconductor integrated circuit comprising:
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a digital sampler; a memory arrangement; and a plurality of correlators, being arranged to be operable in two modes wherein; in an acquisition mode; the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at a first bit rate; the memory arrangement is adapted to receive the digital bit stream and to output at a second bit rate, being higher than the first bit rate; the plurality of correlators is adapted to receive the digital bit stream at the second bit rate, and each of the plurality of correlators is adapted to correlate the digital bit stream with a same locally generated version of one of the different digital codes; and in a track mode; the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at the first bit rate and to provide the digital bit stream direct to each of the plurality of correlators, each correlator is adapted to correlate the digital bit stream with a different locally generated version of one of the digital codes, wherein the memory arrangement includes two shift registers arranged to alternately receive the digital bit stream at the first bit rate while another of the shift registers circulates at the second bit rate. - View Dependent Claims (2, 3, 4)
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5. A method of processing a plurality of received broadcast signals each showing a different respective digital code, the method comprising:
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sampling the received broadcast signals to produce a digital bit stream at a first bit rate; providing the digital bit stream at a second bit rate by reading into a memory arrangement at the first bit rate and reading out at the second bit rate; correlating the digital bit steam at the second bit rate using a plurality of correlators each correlating the digital bit stream with a same one of a locally generated version of the digital codes to acquire the broadcast signals; and subsequently correlating the digital bit stream at the first bit rate using the plurality of correlators each correlating the digital bit stream with a locally generated version of a different one of the digital codes to track previously acquired broadcast signals, wherein providing the digital bit stream at the second bit rate includes alternately reading the bit stream at the first bit rate into one of two shift registers while another of the two shift registers circulates at the second bit rate. - View Dependent Claims (6, 7, 8)
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9. An apparatus to process a plurality of received broadcast signals having digital codes, the apparatus comprising:
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a sampler to sample the received broadcast signals to produce a digital bit stream at a first bit rate in an acquisition mode; a memory unit coupled to the sampler to receive the digital bit stream therefrom and to output the digital bit stream at a second bit rate in the acquisition mode; and a correlator unit coupled to the memory unit to receive the digital bit stream at the second bit rate and to correlate the received digital bit stream with one of the digital codes in the acquisition mode, and wherein the sampler can directly provide the digital bit stream at the first bit rate to the correlator unit in a track mode to allow the correlator to correlate that bit stream to a different one of the digital codes, wherein the memory unit comprises a plurality of shift registers to alternately receive the digital bit stream at the first bit rate, while another of these shift registers circulates at the second bit rate. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A system for processing a plurality of received broadcast signals having digital codes, the system comprising:
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means for sampling the received broadcast signals to produce a digital bit stream at a first bit rate; means for receiving the digital bit stream at the first bit rate and for producing the digital bit stream at a second bit rate; and means for correlating the digital bit stream at the second bit rate with one of the digital codes to acquire the broadcast signals, and for correlating the digital bit stream at the first bit rate with a different one of the digital codes to track the acquired broadcast signals, wherein the means for producing the digital stream at the second bit rate includes means for alternately reading the bit stream at the first bit rate into a plurality of shift registers while one of these shift registers circulates at the second bit rate. - View Dependent Claims (16, 17, 18, 19)
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Specification