Method and apparatus for adapting signaling to maximize the efficiency of spectrum usage for multi-band systems in the presence of interference
First Claim
1. An integrated circuit comprising:
- an up-converter comprising;
a first filter having N outputs, where each output provides a signal shifted in phase from one another;
a second filter having N outputs, where each output provides a signal shifted in phase from one another;
an oscillator providing 2 times N outputs, where the 2 times N outputs provide N pairs of quadrature signals and where each pair of the quadrature signals are shifted in phase from one another;
a first plurality of mixers, each mixer receiving one of the N outputs from the first filter and one of the 2 times N outputs from the oscillator;
a second plurality of mixers, each mixer receiving one of the N outputs from the second filter and one of the 2 times N outputs from the oscillator, wherein an output of each of the first plurality of mixers is combined with an output of the second plurality of mixers; and
a plurality of parallel-to-serial converters, each parallel-to-serial converter receiving a bit from each of the combined outputs of the mixers and providing a serial output.
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Accused Products
Abstract
A method and apparatus for operation in a multi-frequency band wideband system in the presence of an interference, the method comprising the steps: receiving signaling in a plurality of wideband frequency sub-bands, each wideband frequency sub-band having a different center frequency, wherein a bandwidth of each wideband frequency sub-band is at least 2 percent of a center frequency of the wideband frequency sub-band; detecting an interfering signal having signal energy in a portion of a respective sub-band of the wideband frequency sub-bands; modifying at least one of a center frequency and a bandwidth of the respective sub-band in order to operate in the presence of the interfering signal; and instructing a transmitting device transmitting the signaling to transmit subsequent signaling accounting for the modification of the center frequency of the respective sub-band.
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Citations
27 Claims
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1. An integrated circuit comprising:
an up-converter comprising; a first filter having N outputs, where each output provides a signal shifted in phase from one another; a second filter having N outputs, where each output provides a signal shifted in phase from one another; an oscillator providing 2 times N outputs, where the 2 times N outputs provide N pairs of quadrature signals and where each pair of the quadrature signals are shifted in phase from one another; a first plurality of mixers, each mixer receiving one of the N outputs from the first filter and one of the 2 times N outputs from the oscillator; a second plurality of mixers, each mixer receiving one of the N outputs from the second filter and one of the 2 times N outputs from the oscillator, wherein an output of each of the first plurality of mixers is combined with an output of the second plurality of mixers; and a plurality of parallel-to-serial converters, each parallel-to-serial converter receiving a bit from each of the combined outputs of the mixers and providing a serial output. - View Dependent Claims (2, 3, 4, 5, 6, 7, 15, 16, 17, 18, 19, 20)
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8. A method of up-converting a signal comprising:
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receiving in-phase and quadrature versions of a signal; decomposing the in-phase version of the signal into a first plurality of signals, each phase shifted from each other; decomposing the quadrature version of the signal into a second plurality of signals, each phase shifted from each other; multiplying each of the first plurality of signals with a third plurality of signals to generate a fourth plurality of signals; multiplying each of the second plurality of signals with a fifth plurality of signals to generate a sixth plurality of signals; adding each of the fourth plurality of signals with a corresponding one of the sixth plurality of signals to generate a seventh plurality of signals; serializing a plurality of most significant bits of the seventh plurality of signals to generate an eighth signal; and serializing a plurality of least significant bits of the seventh plurality of signals to generate a ninth signal. - View Dependent Claims (9, 10, 11, 12, 13, 14, 27)
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21. An integrated circuit including an up-converter comprising:
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a first polyphase filter having a first plurality of outputs providing a first plurality of output signals, where each of the first plurality of output signals are shifted in phase from one another; a second polyphase filter having a second plurality of outputs providing a second plurality of output signals, where each of the second plurality of output signals are shifted in phase from one another; an oscillator having a third plurality of outputs providing a third plurality of output signals, where each of the third plurality of output signals are shifted in phase from one another, the oscillator further having a fourth plurality of outputs providing a fourth plurality of output signals, where each of the fourth plurality of output signals are shifted in phase from one another, and where each of the fourth plurality of output signals are in quadrature with a corresponding one of the third plurality of output signals; a first plurality of mixers, each of the first plurality of mixers coupled to one of the first plurality of outputs from the first polyphase filter and one of the third plurality of outputs from the oscillator; a second plurality of mixers, each of the second plurality of mixers coupled to one of the second plurality of outputs from the second polyphase filter and one of the fourth plurality of outputs from the oscillator; a plurality of adders, each coupled to an output of one of the first plurality of mixers and an output from one of the second plurality of mixers; and a plurality of parallel-to-serial converters, each parallel-to-serial converter coupled to an output of each of the plurality of adders. - View Dependent Claims (22, 23, 24, 25, 26)
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Specification