Tuning a station
First Claim
1. A DC offset compensation circuit configured to output a first test signal to one of an in-phase (I) branch or a quadrature phase (Q) branch of a modulator circuit and to output a second test signal to the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, the second test signal being of opposite polarity to the first test signal, said DC offset compensation circuit further configured to respond to values of first and second power measurements made at an output of the modulator circuit, said first and second power measurements corresponding to said first and second test signals, respectively, and to modify a DC offset signal of the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, where the DC offset signal is modified to have a value determined to minimize a difference between said values of said first and second power measurements.
2 Assignments
0 Petitions
Accused Products
Abstract
A method of tuning a station is disclosed, wherein a first pilot signal is applied on a circuit of the station and the resulting output power of the signal circuit is subsequently detected. A second pilot signal is then applied to the circuit and the resulting output power of the circuit is detected. The offset of the circuit is then tuned based on information of the resulting output power detected for the first and second signals. A station that is adapted to implement the method may be tuned by the manufacturer thereof or later after having already been taken into use. The tuning may occur automatically as response to a predefined event.
10 Citations
26 Claims
- 1. A DC offset compensation circuit configured to output a first test signal to one of an in-phase (I) branch or a quadrature phase (Q) branch of a modulator circuit and to output a second test signal to the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, the second test signal being of opposite polarity to the first test signal, said DC offset compensation circuit further configured to respond to values of first and second power measurements made at an output of the modulator circuit, said first and second power measurements corresponding to said first and second test signals, respectively, and to modify a DC offset signal of the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, where the DC offset signal is modified to have a value determined to minimize a difference between said values of said first and second power measurements.
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9. A method comprising:
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outputting a first test signal to one of an in-phase (I) branch or a quadrature phase (Q) branch of a modulator circuit; outputting a second test signal to the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, the second test signal being of opposite polarity to the first test signal; responding to values of first and second power measurements made at an output of the modulator circuit, said first and second power measurements corresponding to said first and second test signals, respectively; and modifying a DC offset signal of the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, where the DC offset signal is modified to have a value determined to minimize a difference between said values of said first and second power measurements. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A DC offset compensation circuit comprising:
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means for outputting a first test signal to one of an in-phase (I) branch or a quadrature phase (Q) branch of a modulator circuit; means for outputting a second test signal to the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, the second test signal being of opposite polarity to the first test signal; means for responding to first and second power measurements made at an output of the modulator circuit, said first and second power measurements corresponding to said first and second test signals, respectively; and means for modifying a DC offset signal of the same one of the in-phase (I) branch or the quadrature phase (Q) branch of the modulator circuit, where the DC offset signal is modified to have a value determined to minimize a difference between said values of said first and second power measurements. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 26)
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Specification